<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bwlp/qemu.git/default-configs/mips64el-softmmu.mak, branch spice_video_codecs</title>
<subtitle>Experimental fork of QEMU with video encoding patches</subtitle>
<id>https://git.openslx.org/bwlp/qemu.git/atom/default-configs/mips64el-softmmu.mak?h=spice_video_codecs</id>
<link rel='self' href='https://git.openslx.org/bwlp/qemu.git/atom/default-configs/mips64el-softmmu.mak?h=spice_video_codecs'/>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/'/>
<updated>2020-10-03T12:07:35+00:00</updated>
<entry>
<title>default-configs: move files to default-configs/devices/</title>
<updated>2020-10-03T12:07:35+00:00</updated>
<author>
<name>Paolo Bonzini</name>
</author>
<published>2020-09-18T10:06:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=1bb4cb1c33805c0da0db5b76852bb73759625c4e'/>
<id>urn:sha1:1bb4cb1c33805c0da0db5b76852bb73759625c4e</id>
<content type='text'>
Make room for target files in default-configs/targets/

Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>hw/mips/fuloong2e: Fix typo in Fuloong machine name</title>
<updated>2020-05-26T11:20:48+00:00</updated>
<author>
<name>Philippe Mathieu-Daudé</name>
</author>
<published>2020-04-26T10:16:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=c3a09ff68ddffd1efd57612706484aa386826518'/>
<id>urn:sha1:c3a09ff68ddffd1efd57612706484aa386826518</id>
<content type='text'>
We always miswrote the Fuloong machine... Fix its name.
Add an machine alias to the previous name for backward
compatibility.

Suggested-by: Aleksandar Markovic &lt;amarkovic@wavecomp.com&gt;
Reviewed-by: Aleksandar Markovic &lt;aleksandar.qemu.devel@gmail.com&gt;
Message-id: &lt;20200526104726.11273-11-f4bug@amsat.org&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
</content>
</entry>
<entry>
<title>hw/mips: Express dependencies of the Jazz machine with Kconfig</title>
<updated>2019-07-02T12:18:05+00:00</updated>
<author>
<name>Philippe Mathieu-Daudé</name>
</author>
<published>2019-07-01T11:26:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=a6b1625d6107675f1bd7e3c660814e74ae6d21b6'/>
<id>urn:sha1:a6b1625d6107675f1bd7e3c660814e74ae6d21b6</id>
<content type='text'>
The Jazz use the RC4030 Asic to provide an EISA bus and DMA/IRQ.
The framebuffer display is managed by a G364, the network card is
a Sonic DP83932. A QLogic ESP216 provides a SCSI bus.

None, for the both machine variants (PICA-61 and Magnum 4000),
the DP83932 chipset is soldered on the board, and is MMIO-mapped
(selected via Chip Select). Therefore we have to enforce the
'select' Kconfig rule (we can not use the 'imply' rule helpful
when devices are connected on a bus).

Reviewed-by: Aleksandar Markovic &lt;amarkovic@wavecomp.com&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;philmd@redhat.com&gt;
Signed-off-by: Aleksandar Markovic &lt;amarkovic@wavecomp.com&gt;
Message-Id: &lt;20190701112612.14758-4-philmd@redhat.com&gt;
</content>
</entry>
<entry>
<title>hw/mips/Kconfig: Fulong 2e board requires ati-vga/rtl8139 PCI devices</title>
<updated>2019-03-20T10:44:13+00:00</updated>
<author>
<name>Philippe Mathieu-Daudé</name>
</author>
<published>2019-03-16T20:08:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=b5ea7070e56dc95dba4019b1dc6e830a6b06ab50'/>
<id>urn:sha1:b5ea7070e56dc95dba4019b1dc6e830a6b06ab50</id>
<content type='text'>
This fixes when configuring with --without-default-devices:

  $ qemu-system-mips64el -bios /dev/null -M fulong2e
  qemu-system-mips64el: Unknown device 'ati-vga' for bus 'PCI'
  Aborted (core dumped)

  (gdb) bt
  #0  0x00007ffff5a2753f in __GI_raise (sig=sig@entry=6) at ../sysdeps/unix/sysv/linux/raise.c:50
  #1  0x00007ffff5a11895 in __GI_abort () at abort.c:79
  #2  0x00005555558768d3 in qdev_create (bus=bus@entry=0x5555562664b0, name=name@entry=0x555555b24efb "ati-vga") at hw/core/qdev.c:131
  #3  0x00005555558d15e1 in pci_create_multifunction (bus=bus@entry=0x5555562664b0, devfn=devfn@entry=-1, multifunction=multifunction@entry=false, name=name@entry=0x555555b24efb "ati-vga") at hw/pci/pci.c:2104
  #4  0x00005555558d1a7a in pci_create (bus=bus@entry=0x5555562664b0, devfn=devfn@entry=-1, name=name@entry=0x555555b24efb "ati-vga") at hw/pci/pci.c:2121
  #5  0x0000555555763081 in mips_fulong2e_init (machine=&lt;optimized out&gt;) at hw/mips/mips_fulong2e.c:352
  #6  0x000055555587e23b in machine_run_board_init (machine=0x5555560b2000) at hw/core/machine.c:1030
  #7  0x00005555556cbea2 in main (argc=&lt;optimized out&gt;, argv=&lt;optimized out&gt;, envp=&lt;optimized out&gt;) at vl.c:4463

And then:

  $ qemu-system-mips64el -bios /dev/null -M fulong2e
  qemu-system-mips64el: Unsupported NIC model: rtl8139

Fixes: 862b4a291dc and 7c28b925b7e
Signed-off-by: Philippe Mathieu-Daudé &lt;philmd@redhat.com&gt;
Message-Id: &lt;20190316200818.8265-8-philmd@redhat.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>build: convert pci.mak to Kconfig</title>
<updated>2019-03-07T20:45:53+00:00</updated>
<author>
<name>Paolo Bonzini</name>
</author>
<published>2019-01-23T06:56:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=7c28b925b7e176b4e44ed05d23cf883561000546'/>
<id>urn:sha1:7c28b925b7e176b4e44ed05d23cf883561000546</id>
<content type='text'>
Instead of including the same list of devices for each target,
set CONFIG_PCI to true, and make the devices default to present
whenever PCI is available.  However, s390x does not want all the
PCI devices, so there is a separate symbol to enable them.

Done mostly with the following script:

  while read i; do
     i=${i%=y}; i=${i#CONFIG_}
     sed -i -e'/^config '$i'$/!b' -en \
            -e'a\' -e'    default y if PCI_DEVICES\' -e'    depends on PCI' \
          `grep -lw $i hw/*/Kconfig`
  done &lt; default-configs/pci.mak

followed by replacing a few "depends on" clauses with "select"
whenever the symbol is not really related to PCI.

Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
Signed-off-by: Yang Zhong &lt;yang.zhong@intel.com&gt;
Cc: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Reviewed-by: Thomas Huth &lt;thuth@redhat.com&gt;
Message-Id: &lt;20190123065618.3520-31-yang.zhong@intel.com&gt;
Acked-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>hw/pci/Makefile.objs: make pcie configurable</title>
<updated>2019-03-07T20:45:53+00:00</updated>
<author>
<name>Yang Zhong</name>
</author>
<published>2019-01-23T06:56:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=e9947d18df97e6c6584f020cf9cc995404cc8061'/>
<id>urn:sha1:e9947d18df97e6c6584f020cf9cc995404cc8061</id>
<content type='text'>
Make pcie splited from pci and make it configurable.

Signed-off-by: Yang Zhong &lt;yang.zhong@intel.com&gt;
Cc: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Reviewed-by: Thomas Huth &lt;thuth@redhat.com&gt;
Message-Id: &lt;20190123065618.3520-30-yang.zhong@intel.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>hw/pci-host/Makefile.objs: make CONFIGS clear for PCI EXPRESS</title>
<updated>2019-02-05T15:50:19+00:00</updated>
<author>
<name>Yang Zhong</name>
</author>
<published>2019-02-02T07:24:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=5afdd57ca00f1271094f9a6fb0e29d415a732fc7'/>
<id>urn:sha1:5afdd57ca00f1271094f9a6fb0e29d415a732fc7</id>
<content type='text'>
Change the CONFIGs for PCI EXPRESS and make module name more
clear for code files.

Signed-off-by: Yang Zhong &lt;yang.zhong@intel.com&gt;
Cc: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
Reviewed-by: Thomas Huth &lt;thuth@redhat.com&gt;
Message-Id: &lt;20190202072456.6468-5-yang.zhong@intel.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>hw/mips: MIPS Boston board support</title>
<updated>2017-02-24T10:37:21+00:00</updated>
<author>
<name>Paul Burton</name>
</author>
<published>2016-09-08T14:51:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=df1d8a1f29f567567b9d20be685a4241282e7005'/>
<id>urn:sha1:df1d8a1f29f567567b9d20be685a4241282e7005</id>
<content type='text'>
Introduce support for emulating the MIPS Boston development board. The
Boston board is built around an FPGA &amp; 3 PCIe controllers, one of which
is connected to an Intel EG20T Platform Controller Hub. It is used
during the development &amp; debug of new CPUs and the software intended to
run on them, and is essentially the successor to the older MIPS Malta
board.

This patch does not implement the EG20T, instead connecting an already
supported ICH-9 AHCI controller. Whilst this isn't accurate it's enough
for typical stock Boston software (eg. Linux kernels) to work with hard
disks given that both the ICH-9 &amp; EG20T implement the AHCI
specification.

Boston boards typically boot kernels in the FIT image format, and this
patch will treat kernels provided to QEMU as such. When loading a kernel
directly, the board code will generate minimal firmware much as the
Malta board code does. This firmware will set up the CM, CPC &amp; GIC
register base addresses then set argument registers &amp; jump to the kernel
entry point. Alternatively, bootloader code may be loaded using the bios
argument in which case no firmware will be generated &amp; execution will
proceed from the start of the boot code at the default MIPS boot
exception vector (offset 0x1fc00000 into (c)kseg1).

Currently real Boston boards are always used with FPGA bitfiles that
include a Global Interrupt Controller (GIC), so the interrupt
configuration is only defined for such cases. Therefore the board will
only allow use of CPUs which implement the CPS components, including the
GIC, and will otherwise exit with a message.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Reviewed-by: Yongbok Kim &lt;yongbok.kim@imgtec.com&gt;
[yongbok.kim@imgtec.com:
  isolated boston machine support for mips64el.
  updated for recent Chardev changes.
  ignore missing bios/kernel for qtest.
  added default -drive to if=ide explicitly.
  changed default memory size into 1G due to make check failure
  on 32-bit hosts]
Signed-off-by: Yongbok Kim &lt;yongbok.kim@imgtec.com&gt;
</content>
</entry>
<entry>
<title>Revert "hw/mips: MIPS Boston board support"</title>
<updated>2017-02-23T18:04:45+00:00</updated>
<author>
<name>Peter Maydell</name>
</author>
<published>2017-02-23T18:04:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=2d896b454a0e19ec4c1ddbb0e0b65b7e54fcedf3'/>
<id>urn:sha1:2d896b454a0e19ec4c1ddbb0e0b65b7e54fcedf3</id>
<content type='text'>
This reverts commit d3473e147a754e999718bf6fcb015d9978c6a1ee.

This commit creates a board which defaults to having 2GB of RAM.
Unfortunately on 32-bit hosts we can't create boards with 2GB of RAM,
and so 'make check' fails. I missed this during testing of the
merge, unfortunately. Luckily the offending commit is the last
one in the merge request, so we can just revert it for now.

Signed-off-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
</content>
</entry>
<entry>
<title>hw/mips: MIPS Boston board support</title>
<updated>2017-02-21T23:49:30+00:00</updated>
<author>
<name>Paul Burton</name>
</author>
<published>2016-09-08T14:51:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=d3473e147a754e999718bf6fcb015d9978c6a1ee'/>
<id>urn:sha1:d3473e147a754e999718bf6fcb015d9978c6a1ee</id>
<content type='text'>
Introduce support for emulating the MIPS Boston development board. The
Boston board is built around an FPGA &amp; 3 PCIe controllers, one of which
is connected to an Intel EG20T Platform Controller Hub. It is used
during the development &amp; debug of new CPUs and the software intended to
run on them, and is essentially the successor to the older MIPS Malta
board.

This patch does not implement the EG20T, instead connecting an already
supported ICH-9 AHCI controller. Whilst this isn't accurate it's enough
for typical stock Boston software (eg. Linux kernels) to work with hard
disks given that both the ICH-9 &amp; EG20T implement the AHCI
specification.

Boston boards typically boot kernels in the FIT image format, and this
patch will treat kernels provided to QEMU as such. When loading a kernel
directly, the board code will generate minimal firmware much as the
Malta board code does. This firmware will set up the CM, CPC &amp; GIC
register base addresses then set argument registers &amp; jump to the kernel
entry point. Alternatively, bootloader code may be loaded using the bios
argument in which case no firmware will be generated &amp; execution will
proceed from the start of the boot code at the default MIPS boot
exception vector (offset 0x1fc00000 into (c)kseg1).

Currently real Boston boards are always used with FPGA bitfiles that
include a Global Interrupt Controller (GIC), so the interrupt
configuration is only defined for such cases. Therefore the board will
only allow use of CPUs which implement the CPS components, including the
GIC, and will otherwise exit with a message.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Reviewed-by: Yongbok Kim &lt;yongbok.kim@imgtec.com&gt;
[yongbok.kim@imgtec.com:
  isolated boston machine support for mips64el.
  updated for recent Chardev changes.
  ignore missing bios/kernel for qtest.
  added default -drive to if=ide explicitly]
Signed-off-by: Yongbok Kim &lt;yongbok.kim@imgtec.com&gt;
</content>
</entry>
</feed>
