<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bwlp/qemu.git/default-configs/riscv64-softmmu.mak, branch spice_video_codecs</title>
<subtitle>Experimental fork of QEMU with video encoding patches</subtitle>
<id>https://git.openslx.org/bwlp/qemu.git/atom/default-configs/riscv64-softmmu.mak?h=spice_video_codecs</id>
<link rel='self' href='https://git.openslx.org/bwlp/qemu.git/atom/default-configs/riscv64-softmmu.mak?h=spice_video_codecs'/>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/'/>
<updated>2020-10-03T12:07:35+00:00</updated>
<entry>
<title>default-configs: move files to default-configs/devices/</title>
<updated>2020-10-03T12:07:35+00:00</updated>
<author>
<name>Paolo Bonzini</name>
</author>
<published>2020-09-18T10:06:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=1bb4cb1c33805c0da0db5b76852bb73759625c4e'/>
<id>urn:sha1:1bb4cb1c33805c0da0db5b76852bb73759625c4e</id>
<content type='text'>
Make room for target files in default-configs/targets/

Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>hw/riscv: Initial support for Microchip PolarFire SoC Icicle Kit board</title>
<updated>2020-09-09T22:54:18+00:00</updated>
<author>
<name>Bin Meng</name>
</author>
<published>2020-09-01T01:38:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=56f6e31e7b7e06a66a0efd5464fa4257de7ec242'/>
<id>urn:sha1:56f6e31e7b7e06a66a0efd5464fa4257de7ec242</id>
<content type='text'>
This is an initial support for Microchip PolarFire SoC Icicle Kit.
The Icicle Kit board integrates a PolarFire SoC, with one SiFive's
E51 plus four U54 cores and many on-chip peripherals and an FPGA.

For more details about Microchip PolarFire Soc, please see:
https://www.microsemi.com/product-directory/soc-fpgas/5498-polarfire-soc-fpga

Unlike SiFive FU540, the RISC-V core resect vector is at 0x20220000.
The following perepherals are created as an unimplemented device:

- Bus Error Uint 0/1/2/3/4
- L2 cache controller
- SYSREG
- MPUCFG
- IOSCBCFG

More devices will be added later.

The BIOS image used by this machine is hss.bin, aka Hart Software
Services, which can be built from:
https://github.com/polarfire-soc/hart-software-services

To launch this machine:
$ qemu-system-riscv64 -nographic -M microchip-icicle-kit

The memory is set to 1 GiB by default to match the hardware.
A sanity check on ram size is performed in the machine init routine
to prompt user to increase the RAM size to &gt; 1 GiB when less than
1 GiB ram is detected.

Signed-off-by: Bin Meng &lt;bin.meng@windriver.com&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Message-Id: &lt;1598924352-89526-5-git-send-email-bmeng.cn@gmail.com&gt;
Signed-off-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
</content>
</entry>
<entry>
<title>riscv: Initial commit of OpenTitan machine</title>
<updated>2020-06-03T16:11:51+00:00</updated>
<author>
<name>Alistair Francis</name>
</author>
<published>2020-04-23T18:30:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=fe0fe4735e798578097758781166cc221319b93d'/>
<id>urn:sha1:fe0fe4735e798578097758781166cc221319b93d</id>
<content type='text'>
This adds a barebone OpenTitan machine to QEMU.

Signed-off-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Reviewed-by: Bin Meng &lt;bin.meng@windriver.com&gt;
</content>
</entry>
<entry>
<title>riscv-softmmu.mak: replace CONFIG_* with Kconfig "select" directives</title>
<updated>2019-03-07T20:46:19+00:00</updated>
<author>
<name>Paolo Bonzini</name>
</author>
<published>2019-01-29T11:16:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=82a230d5a3031d19ca522f52251046ba30242828'/>
<id>urn:sha1:82a230d5a3031d19ca522f52251046ba30242828</id>
<content type='text'>
%-softmmu.mak only keep boards and optional device
definitions in Kconfig mode.

Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>build: convert usb.mak to Kconfig</title>
<updated>2019-03-07T20:45:53+00:00</updated>
<author>
<name>Paolo Bonzini</name>
</author>
<published>2019-01-23T06:56:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=d6e9c470fc91f75db1785f17a9d3567d5a27953d'/>
<id>urn:sha1:d6e9c470fc91f75db1785f17a9d3567d5a27953d</id>
<content type='text'>
Instead of including the same list of devices for each target,
let the host controllers select CONFIG_USB and make the devices
default to present whenever USB is available.

Done with the following script:
  while read i; do
     i=${i%=y}; i=${i#CONFIG_}
     sed -i -e'/^config '$i'$/!b' -en \
            -e'a\' -e'    default y\' -e'    depends on USB' \
          `grep -lw $i hw/*/Kconfig`
  done &lt; default-configs/usb.mak

followed by adding "select USB" on the host controllers.

Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
Signed-off-by: Yang Zhong &lt;yang.zhong@intel.com&gt;
Reviewed-by: Thomas Huth &lt;thuth@redhat.com&gt;
Message-Id: &lt;20190123065618.3520-33-yang.zhong@intel.com&gt;
Acked-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>build: convert pci.mak to Kconfig</title>
<updated>2019-03-07T20:45:53+00:00</updated>
<author>
<name>Paolo Bonzini</name>
</author>
<published>2019-01-23T06:56:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=7c28b925b7e176b4e44ed05d23cf883561000546'/>
<id>urn:sha1:7c28b925b7e176b4e44ed05d23cf883561000546</id>
<content type='text'>
Instead of including the same list of devices for each target,
set CONFIG_PCI to true, and make the devices default to present
whenever PCI is available.  However, s390x does not want all the
PCI devices, so there is a separate symbol to enable them.

Done mostly with the following script:

  while read i; do
     i=${i%=y}; i=${i#CONFIG_}
     sed -i -e'/^config '$i'$/!b' -en \
            -e'a\' -e'    default y if PCI_DEVICES\' -e'    depends on PCI' \
          `grep -lw $i hw/*/Kconfig`
  done &lt; default-configs/pci.mak

followed by replacing a few "depends on" clauses with "select"
whenever the symbol is not really related to PCI.

Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
Signed-off-by: Yang Zhong &lt;yang.zhong@intel.com&gt;
Cc: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Reviewed-by: Thomas Huth &lt;thuth@redhat.com&gt;
Message-Id: &lt;20190123065618.3520-31-yang.zhong@intel.com&gt;
Acked-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>hw/pci/Makefile.objs: make pcie configurable</title>
<updated>2019-03-07T20:45:53+00:00</updated>
<author>
<name>Yang Zhong</name>
</author>
<published>2019-01-23T06:56:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=e9947d18df97e6c6584f020cf9cc995404cc8061'/>
<id>urn:sha1:e9947d18df97e6c6584f020cf9cc995404cc8061</id>
<content type='text'>
Make pcie splited from pci and make it configurable.

Signed-off-by: Yang Zhong &lt;yang.zhong@intel.com&gt;
Cc: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Reviewed-by: Thomas Huth &lt;thuth@redhat.com&gt;
Message-Id: &lt;20190123065618.3520-30-yang.zhong@intel.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>hw/riscv/Makefile.objs: Create CONFIG_* for riscv boards</title>
<updated>2019-02-05T15:50:20+00:00</updated>
<author>
<name>Yang Zhong</name>
</author>
<published>2019-02-02T07:24:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=3fa86eb366b3996286d8766fba401dade1db031a'/>
<id>urn:sha1:3fa86eb366b3996286d8766fba401dade1db031a</id>
<content type='text'>
Add the new configs to default-configs/riscv*-sofmmu.mak.

Signed-off-by: Yang Zhong &lt;yang.zhong@intel.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Reviewed-by: Thomas Huth &lt;thuth@redhat.com&gt;
Message-Id: &lt;20190202072456.6468-19-yang.zhong@intel.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>hw/pci-host/Makefile.objs: make CONFIGS clear for PCI EXPRESS</title>
<updated>2019-02-05T15:50:19+00:00</updated>
<author>
<name>Yang Zhong</name>
</author>
<published>2019-02-02T07:24:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=5afdd57ca00f1271094f9a6fb0e29d415a732fc7'/>
<id>urn:sha1:5afdd57ca00f1271094f9a6fb0e29d415a732fc7</id>
<content type='text'>
Change the CONFIGs for PCI EXPRESS and make module name more
clear for code files.

Signed-off-by: Yang Zhong &lt;yang.zhong@intel.com&gt;
Cc: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
Reviewed-by: Thomas Huth &lt;thuth@redhat.com&gt;
Message-Id: &lt;20190202072456.6468-5-yang.zhong@intel.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>default-configs: Enable USB support for RISC-V machines</title>
<updated>2019-01-10T01:34:10+00:00</updated>
<author>
<name>Alistair Francis</name>
</author>
<published>2019-01-10T00:01:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=f7cdfa38f37e0985457ac03c3238861144a58b4c'/>
<id>urn:sha1:f7cdfa38f37e0985457ac03c3238861144a58b4c</id>
<content type='text'>
Signed-off-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</content>
</entry>
</feed>
