<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bwlp/qemu.git/hw/char/Kconfig, branch spice_video_codecs</title>
<subtitle>Experimental fork of QEMU with video encoding patches</subtitle>
<id>https://git.openslx.org/bwlp/qemu.git/atom/hw/char/Kconfig?h=spice_video_codecs</id>
<link rel='self' href='https://git.openslx.org/bwlp/qemu.git/atom/hw/char/Kconfig?h=spice_video_codecs'/>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/'/>
<updated>2021-09-01T01:59:12+00:00</updated>
<entry>
<title>hw/char: Add config for shakti uart</title>
<updated>2021-09-01T01:59:12+00:00</updated>
<author>
<name>Vijai Kumar K</name>
</author>
<published>2021-07-31T19:02:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=46b3e2548bd49f9bc8866bf5e20f74c86948cefc'/>
<id>urn:sha1:46b3e2548bd49f9bc8866bf5e20f74c86948cefc</id>
<content type='text'>
Use a dedicated UART config(CONFIG_SHAKTI_UART) to select
shakti uart.

Signed-off-by: Vijai Kumar K &lt;vijai@behindbytes.com&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Message-id: 20210731190229.137483-1-vijai@behindbytes.com
Signed-off-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
</content>
</entry>
<entry>
<title>hw/riscv/Kconfig: Add missing dependency MICROCHIP_PFSOC -&gt; SERIAL</title>
<updated>2021-07-20T13:32:34+00:00</updated>
<author>
<name>Philippe Mathieu-Daudé</name>
</author>
<published>2021-05-13T05:50:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=8cbb537ea979c5312cbcb2770d1afae3779be7a1'/>
<id>urn:sha1:8cbb537ea979c5312cbcb2770d1afae3779be7a1</id>
<content type='text'>
Commit a8fb0a500a6 ("hw/char: Add Microchip PolarFire SoC MMUART
emulation") added a dependency on the SERIAL model, but forgot to
add the Kconfig selector.
Add the dependency to the MCHP_PFSOC_MMUART symbol to fix when
building the MICROCHIP_PFSOC machine stand-alone:

  /usr/bin/ld: libcommon.fa.p/hw_char_mchp_pfsoc_mmuart.c.o: in function `mchp_pfsoc_mmuart_create':
  hw/char/mchp_pfsoc_mmuart.c:79: undefined reference to `serial_mm_init'

Fixes: a8fb0a500a6 ("hw/char: Add Microchip PolarFire SoC MMUART emulation")
Acked-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;philmd@redhat.com&gt;
Message-Id: &lt;20210515173716.358295-7-philmd@redhat.com&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>hw/char: add goldfish-tty</title>
<updated>2021-03-15T20:02:03+00:00</updated>
<author>
<name>Laurent Vivier</name>
</author>
<published>2021-03-12T21:41:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=8c6df16ff6080365642b0583514dd03d6a7729d6'/>
<id>urn:sha1:8c6df16ff6080365642b0583514dd03d6a7729d6</id>
<content type='text'>
Implement the goldfish tty device as defined in

https://android.googlesource.com/platform/external/qemu/+/master/docs/GOLDFISH-VIRTUAL-HARDWARE.TXT

and based on the kernel driver code:

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/tty/goldfish.c

Signed-off-by: Laurent Vivier &lt;laurent@vivier.eu&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Tested-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Message-Id: &lt;20210312214145.2936082-2-laurent@vivier.eu&gt;
</content>
</entry>
<entry>
<title>hw/char: Introduce SH_SCI Kconfig entry</title>
<updated>2021-03-06T15:18:42+00:00</updated>
<author>
<name>Philippe Mathieu-Daudé</name>
</author>
<published>2021-02-21T18:52:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=7ae5c8bb6e57b08927a0f9ecae610abda0484ec6'/>
<id>urn:sha1:7ae5c8bb6e57b08927a0f9ecae610abda0484ec6</id>
<content type='text'>
We want to be able to use the 'SH4' config for architecture
specific features. Add more fine-grained selection by adding
a CONFIG_SH_SCI selector for the SH4 serial controller.

Add the missing MAINTAINERS entries.

Suggested-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Reviewed-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Acked-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
Message-Id: &lt;20210222141514.2646278-5-f4bug@amsat.org&gt;
</content>
</entry>
<entry>
<title>hw/riscv: Move sifive_uart model to hw/char</title>
<updated>2020-09-09T22:54:19+00:00</updated>
<author>
<name>Bin Meng</name>
</author>
<published>2020-09-03T10:40:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=b609b7e3199912e16ef3b0447823f21fed73597e'/>
<id>urn:sha1:b609b7e3199912e16ef3b0447823f21fed73597e</id>
<content type='text'>
This is an effort to clean up the hw/riscv directory. Ideally it
should only contain the RISC-V SoC / machine codes plus generic
codes. Let's move sifive_uart model to hw/char directory.

Signed-off-by: Bin Meng &lt;bin.meng@windriver.com&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Message-Id: &lt;1599129623-68957-9-git-send-email-bmeng.cn@gmail.com&gt;
Signed-off-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
</content>
</entry>
<entry>
<title>hw/riscv: Move riscv_htif model to hw/char</title>
<updated>2020-09-09T22:54:19+00:00</updated>
<author>
<name>Bin Meng</name>
</author>
<published>2020-09-03T10:40:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=70eb9f9cd1c0b519b31df8ab08ee2198b0e16176'/>
<id>urn:sha1:70eb9f9cd1c0b519b31df8ab08ee2198b0e16176</id>
<content type='text'>
This is an effort to clean up the hw/riscv directory. Ideally it
should only contain the RISC-V SoC / machine codes plus generic
codes. Let's move riscv_htif model to hw/char directory.

Signed-off-by: Bin Meng &lt;bin.meng@windriver.com&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Message-Id: &lt;1599129623-68957-8-git-send-email-bmeng.cn@gmail.com&gt;
Signed-off-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
</content>
</entry>
<entry>
<title>hw/char: Add Microchip PolarFire SoC MMUART emulation</title>
<updated>2020-09-09T22:54:18+00:00</updated>
<author>
<name>Bin Meng</name>
</author>
<published>2020-09-01T01:39:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=a8fb0a500a695104cda5837b7aba93dee3abddde'/>
<id>urn:sha1:a8fb0a500a695104cda5837b7aba93dee3abddde</id>
<content type='text'>
Microchip PolarFire SoC MMUART is ns16550 compatible, with some
additional registers. Create a simple MMUART model built on top
of the existing ns16550 model.

Signed-off-by: Bin Meng &lt;bin.meng@windriver.com&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Message-Id: &lt;1598924352-89526-6-git-send-email-bmeng.cn@gmail.com&gt;
Signed-off-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
</content>
</entry>
<entry>
<title>hw/char: avr: Add limited support for USART peripheral</title>
<updated>2020-07-11T09:02:05+00:00</updated>
<author>
<name>Michael Rolnik</name>
</author>
<published>2020-01-24T00:51:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=429ca9d6658019e27ee07e459a495f112f4dbb96'/>
<id>urn:sha1:429ca9d6658019e27ee07e459a495f112f4dbb96</id>
<content type='text'>
These were designed to facilitate testing but should provide enough
function to be useful in other contexts.  Only a subset of the functions
of each peripheral is implemented, mainly due to the lack of a standard
way to handle electrical connections (like GPIO pins).

[AM: Remove word 'Atmel' from filenames and all elements of code]
Suggested-by: Aleksandar Markovic &lt;aleksandar.m.mail@gmail.com&gt;
Signed-off-by: Michael Rolnik &lt;mrolnik@gmail.com&gt;
Signed-off-by: Sarah Harris &lt;S.E.Harris@kent.ac.uk&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
[rth: Squash I/O size fix and file rename from f4bug]
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Signed-off-by: Aleksandar Markovic &lt;aleksandar.m.mail@gmail.com&gt;
Reviewed-by: Aleksandar Markovic &lt;aleksandar.m.mail@gmail.com&gt;
Signed-off-by: Thomas Huth &lt;huth@tuxfamily.org&gt;
Message-Id: &lt;20200705140315.260514-20-huth@tuxfamily.org&gt;
</content>
</entry>
<entry>
<title>hw/char: RX62N serial communication interface (SCI)</title>
<updated>2020-06-22T16:37:12+00:00</updated>
<author>
<name>Yoshinori Sato</name>
</author>
<published>2019-01-21T13:15:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=645194c7aa8ff501cfdab864c9f5cdf220c3af76'/>
<id>urn:sha1:645194c7aa8ff501cfdab864c9f5cdf220c3af76</id>
<content type='text'>
This module supported only non FIFO type.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf

Signed-off-by: Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;
Reviewed-by: Alex Bennée &lt;alex.bennee@linaro.org&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;philmd@redhat.com&gt;
Tested-by: Philippe Mathieu-Daudé &lt;philmd@redhat.com&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Message-Id: &lt;20200224141923.82118-17-ysato@users.sourceforge.jp&gt;
[PMD: Filled VMStateField for migration]
Signed-off-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
</content>
</entry>
<entry>
<title>hw/char: Move multi-serial devices into separate file</title>
<updated>2019-05-17T13:19:39+00:00</updated>
<author>
<name>Thomas Huth</name>
</author>
<published>2019-03-31T12:40:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=d09ecd8c14d11d805f65445557cfa691a510dd31'/>
<id>urn:sha1:d09ecd8c14d11d805f65445557cfa691a510dd31</id>
<content type='text'>
In our downstream distribution of QEMU, we'd like to ship the binary
without the multi-serial PCI devices. To make this disablement easier,
let's move the devices into a separate file and add a proper Kconfig-
switch for these devices.

Signed-off-by: Thomas Huth &lt;thuth@redhat.com&gt;
Message-Id: &lt;1554036028-31410-1-git-send-email-thuth@redhat.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
</feed>
