<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bwlp/qemu.git/hw/gpio, branch spice_video_codecs</title>
<subtitle>Experimental fork of QEMU with video encoding patches</subtitle>
<id>https://git.openslx.org/bwlp/qemu.git/atom/hw/gpio?h=spice_video_codecs</id>
<link rel='self' href='https://git.openslx.org/bwlp/qemu.git/atom/hw/gpio?h=spice_video_codecs'/>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/'/>
<updated>2022-10-17T19:15:09+00:00</updated>
<entry>
<title>hw/gpio/meson: Introduce dedicated config switch for hw/gpio/mpc8xxx</title>
<updated>2022-10-17T19:15:09+00:00</updated>
<author>
<name>Bernhard Beschow</name>
</author>
<published>2022-10-03T20:31:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=2c860abfb6c097ba8cf22316ff9957485d0ff4ad'/>
<id>urn:sha1:2c860abfb6c097ba8cf22316ff9957485d0ff4ad</id>
<content type='text'>
Having a dedicated config switch makes dependency handling cleaner.

Signed-off-by: Bernhard Beschow &lt;shentey@gmail.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Message-Id: &lt;20221003203142.24355-3-shentey@gmail.com&gt;
Signed-off-by: Daniel Henrique Barboza &lt;danielhb413@gmail.com&gt;
</content>
</entry>
<entry>
<title>hw/gpio/aspeed: Don't let guests modify input pins</title>
<updated>2022-07-14T14:24:38+00:00</updated>
<author>
<name>Peter Delevoryas</name>
</author>
<published>2022-07-14T14:24:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=1f30db922c72ca8c9de31f58a996bc21ee668304'/>
<id>urn:sha1:1f30db922c72ca8c9de31f58a996bc21ee668304</id>
<content type='text'>
Up until now, guests could modify input pins by overwriting the data
value register. The guest OS should only be allowed to modify output pin
values, and the QOM property setter should only be permitted to modify
input pins.

This change also updates the gpio input pin test to match this
expectation.

Andrew suggested this particularly refactoring here:

    https://lore.kernel.org/qemu-devel/23523aa1-ba81-412b-92cc-8174faba3612@www.fastmail.com/

Suggested-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Signed-off-by: Peter Delevoryas &lt;peter@pjd.dev&gt;
Fixes: 4b7f956862dc ("hw/gpio: Add basic Aspeed GPIO model for AST2400 and AST2500")
Reviewed-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Message-Id: &lt;20220712023219.41065-3-peter@pjd.dev&gt;
Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
</content>
</entry>
<entry>
<title>hw/gpio: replace HWADDR_PRIx with PRIx64</title>
<updated>2022-05-25T08:31:33+00:00</updated>
<author>
<name>Jamin Lin</name>
</author>
<published>2022-05-25T08:31:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=554c294514dc7445c5442266a50012ed774d63fe'/>
<id>urn:sha1:554c294514dc7445c5442266a50012ed774d63fe</id>
<content type='text'>
1. replace HWADDR_PRIx with PRIx64
2. fix indent issue

Signed-off-by: Jamin Lin &lt;jamin_lin@aspeedtech.com&gt;
Reviewed-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Message-Id: &lt;20220525053444.27228-5-jamin_lin@aspeedtech.com&gt;
Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
</content>
</entry>
<entry>
<title>hw/gpio support GPIO index mode for write operation.</title>
<updated>2022-05-25T08:31:33+00:00</updated>
<author>
<name>Jamin Lin</name>
</author>
<published>2022-05-25T08:31:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=247c00294a4b3cc694f24811eef07e57eb67aa82'/>
<id>urn:sha1:247c00294a4b3cc694f24811eef07e57eb67aa82</id>
<content type='text'>
It did not support GPIO index mode for read operation.

Signed-off-by: Jamin Lin &lt;jamin_lin@aspeedtech.com&gt;
Reviewed-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Message-Id: &lt;20220525053444.27228-4-jamin_lin@aspeedtech.com&gt;
Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
</content>
</entry>
<entry>
<title>hw/gpio: Add ASPEED GPIO model for AST1030</title>
<updated>2022-05-25T08:31:33+00:00</updated>
<author>
<name>Jamin Lin</name>
</author>
<published>2022-05-25T08:31:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=17075ef244d4ca52f7f097927c72b0e09f8d8a5c'/>
<id>urn:sha1:17075ef244d4ca52f7f097927c72b0e09f8d8a5c</id>
<content type='text'>
AST1030 integrates one set of Parallel GPIO Controller
with maximum 151 control pins, which are 21 groups
(A~U, exclude pin: M6 M7 Q5 Q6 Q7 R0 R1 R4 R5 R6 R7 S0 S3 S4
S5 S6 S7 ) and the group T and U are input only.

Signed-off-by: Jamin Lin &lt;jamin_lin@aspeedtech.com&gt;
Reviewed-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Message-Id: &lt;20220525053444.27228-3-jamin_lin@aspeedtech.com&gt;
Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
</content>
</entry>
<entry>
<title>hw/gpio Add GPIO read/write trace event.</title>
<updated>2022-05-25T08:31:33+00:00</updated>
<author>
<name>Jamin Lin</name>
</author>
<published>2022-05-25T08:31:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=7b1d21a8ba1e6091f1e54c74e7c664e26300accc'/>
<id>urn:sha1:7b1d21a8ba1e6091f1e54c74e7c664e26300accc</id>
<content type='text'>
Add GPIO read/write trace event for aspeed model.

Signed-off-by: Jamin Lin &lt;jamin_lin@aspeedtech.com&gt;
Reviewed-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Message-Id: &lt;20220525053444.27228-2-jamin_lin@aspeedtech.com&gt;
Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
</content>
</entry>
<entry>
<title>hw/gpio/aspeed_gpio: Fix QOM pin property</title>
<updated>2022-05-02T15:03:04+00:00</updated>
<author>
<name>Peter Delevoryas</name>
</author>
<published>2022-05-02T15:03:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=2ec063788efd3a545c5aa2999159c9303bb476f3'/>
<id>urn:sha1:2ec063788efd3a545c5aa2999159c9303bb476f3</id>
<content type='text'>
I was setting gpioV4-7 to "1110" using the QOM pin property handler and
noticed that lowering gpioV7 was inadvertently lowering gpioV4-6 too.

    (qemu) qom-set /machine/soc/gpio gpioV4 true
    (qemu) qom-set /machine/soc/gpio gpioV5 true
    (qemu) qom-set /machine/soc/gpio gpioV6 true
    (qemu) qom-get /machine/soc/gpio gpioV4
    true
    (qemu) qom-set /machine/soc/gpio gpioV7 false
    (qemu) qom-get /machine/soc/gpio gpioV4
    false

An expression in aspeed_gpio_set_pin_level was using a logical NOT
operator instead of a bitwise NOT operator:

    value &amp;= !pin_mask;

The original author probably intended to make a bitwise NOT expression
"~", but mistakenly used a logical NOT operator "!" instead. Some
programming languages like Rust use "!" for both purposes.

Fixes: 4b7f956862dc ("hw/gpio: Add basic Aspeed GPIO model for AST2400 and
AST2500")
Signed-off-by: Peter Delevoryas &lt;pdel@fb.com&gt;
Message-Id: &lt;20220502080827.244815-1-pdel@fb.com&gt;
Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
</content>
</entry>
<entry>
<title>hw: aspeed_gpio: Cleanup stray semicolon after switch</title>
<updated>2022-03-08T08:18:11+00:00</updated>
<author>
<name>Andrew Jeffery</name>
</author>
<published>2022-03-08T08:18:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=46179776c292f83848df90de60da5ae1a965ce6a'/>
<id>urn:sha1:46179776c292f83848df90de60da5ae1a965ce6a</id>
<content type='text'>
Not sure how that got there.

Signed-off-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Message-Id: &lt;20220207150409.358888-2-andrew@aj.id.au&gt;
Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
</content>
</entry>
<entry>
<title>exec/exec-all: Move 'qemu/log.h' include in units requiring it</title>
<updated>2022-02-21T09:18:06+00:00</updated>
<author>
<name>Philippe Mathieu-Daudé</name>
</author>
<published>2022-02-07T08:27:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=cd6174843b0896c9e57176159b38ecba45bade0e'/>
<id>urn:sha1:cd6174843b0896c9e57176159b38ecba45bade0e</id>
<content type='text'>
Many files use "qemu/log.h" declarations but neglect to include
it (they inherit it via "exec/exec-all.h"). "exec/exec-all.h" is
a core component and shouldn't be used that way. Move the
"qemu/log.h" inclusion locally to each unit requiring it.

Signed-off-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Acked-by: Thomas Huth &lt;thuth@redhat.com&gt;
Message-Id: &lt;20220207082756.82600-10-f4bug@amsat.org&gt;
Signed-off-by: Thomas Huth &lt;thuth@redhat.com&gt;
</content>
</entry>
<entry>
<title>Remove unnecessary minimum_version_id_old fields</title>
<updated>2022-01-28T14:38:23+00:00</updated>
<author>
<name>Peter Maydell</name>
</author>
<published>2022-01-18T10:44:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=17e313406126125036191f11e9c70298be34c987'/>
<id>urn:sha1:17e313406126125036191f11e9c70298be34c987</id>
<content type='text'>
The migration code will not look at a VMStateDescription's
minimum_version_id_old field unless that VMSD has set the
load_state_old field to something non-NULL.  (The purpose of
minimum_version_id_old is to specify what migration version is needed
for the code in the function pointed to by load_state_old to be able
to handle it on incoming migration.)

We have exactly one VMSD which still has a load_state_old,
in the PPC CPU; every other VMSD which sets minimum_version_id_old
is doing so unnecessarily. Delete all the unnecessary ones.

Commit created with:
  sed -i '/\.minimum_version_id_old/d' $(git grep -l '\.minimum_version_id_old')
with the one legitimate use then hand-edited back in.

Signed-off-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Reviewed-by: Juan Quintela &lt;quintela@redhat.com&gt;

Signed-off-by: Juan Quintela &lt;quintela@redhat.com&gt;

---

It missed vmstate_ppc_cpu.
</content>
</entry>
</feed>
