<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bwlp/qemu.git/hw/mips, branch spice_video_codecs</title>
<subtitle>Experimental fork of QEMU with video encoding patches</subtitle>
<id>https://git.openslx.org/bwlp/qemu.git/atom/hw/mips?h=spice_video_codecs</id>
<link rel='self' href='https://git.openslx.org/bwlp/qemu.git/atom/hw/mips?h=spice_video_codecs'/>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/'/>
<updated>2022-10-31T10:32:56+00:00</updated>
<entry>
<title>hw/mips/malta: Use bootloader helper to set BAR registers</title>
<updated>2022-10-31T10:32:56+00:00</updated>
<author>
<name>Jiaxun Yang</name>
</author>
<published>2022-10-26T19:18:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=0c8427baf0f66bdaecae41891304f6e15242e682'/>
<id>urn:sha1:0c8427baf0f66bdaecae41891304f6e15242e682</id>
<content type='text'>
Translate embedded assembly into IO writes which is more
readable.

Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Message-Id: &lt;20210127065424.114125-4-jiaxun.yang@flygoat.com&gt;
[PMD: Explode addresses/values to ease review/maintainance]
Tested-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Reviewed-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
Message-Id: &lt;20221026191821.28167-4-philmd@linaro.org&gt;
</content>
</entry>
<entry>
<title>hw/mips: Use bl_gen_kernel_jump to generate bootloaders</title>
<updated>2022-10-31T10:32:54+00:00</updated>
<author>
<name>Jiaxun Yang</name>
</author>
<published>2022-10-26T19:18:20+00:00</published>
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<id>urn:sha1:fe1f2f4e92782b00ed7edb355c227a2073cfa45b</id>
<content type='text'>
Replace embedded binary with generated code.

Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Message-Id: &lt;20210127065424.114125-3-jiaxun.yang@flygoat.com&gt;
[PMD: Pass semihosting_get_argc() to bl_gen_jump_kernel()]
Tested-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Reviewed-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
Message-Id: &lt;20221026191821.28167-3-philmd@linaro.org&gt;
</content>
</entry>
<entry>
<title>hw/mips/bootloader: Allow bl_gen_jump_kernel to optionally set register</title>
<updated>2022-10-31T10:32:45+00:00</updated>
<author>
<name>Philippe Mathieu-Daudé</name>
</author>
<published>2022-10-26T19:18:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=36d7487b2aa033e9792fb310c39d106ffcadaa4f'/>
<id>urn:sha1:36d7487b2aa033e9792fb310c39d106ffcadaa4f</id>
<content type='text'>
When one of the $sp/$a[0..3] register is already set, we might
want bl_gen_jump_kernel() to NOT set it again. Pass a boolean
argument for each register, to allow to optionally set them.

Tested-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Reviewed-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
Message-Id: &lt;20221026191821.28167-2-philmd@linaro.org&gt;
</content>
</entry>
<entry>
<title>hw/mips/boston: Don't set link_up for xilinx-pcie</title>
<updated>2022-10-31T10:32:07+00:00</updated>
<author>
<name>Jiaxun Yang</name>
</author>
<published>2022-10-24T14:35:40+00:00</published>
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<id>urn:sha1:3c43fc333be7747a29405bdf6b3bd9e82fa22164</id>
<content type='text'>
PCIe port 0 and 1 had link_up set as false previously,
that makes those two ports effectively useless. It can
be annoying for users to find that the device they plug
on those buses won't work at all.

As link_up is true by default, just don't set it again in
boston platform code.

Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Message-Id: &lt;20221024143540.97545-1-jiaxun.yang@flygoat.com&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
</content>
</entry>
<entry>
<title>hw/isa/piix4: Move pci_ide_create_devs() call to board code</title>
<updated>2022-10-31T10:32:07+00:00</updated>
<author>
<name>Bernhard Beschow</name>
</author>
<published>2022-10-22T15:04:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=d240d3fb14031ed2b00b86ab8e9082ba6bebce4d'/>
<id>urn:sha1:d240d3fb14031ed2b00b86ab8e9082ba6bebce4d</id>
<content type='text'>
For the VIA south bridges there was a comment to have the call in board code.
Move it there for PIIX4 as well for consistency.

Signed-off-by: Bernhard Beschow &lt;shentey@gmail.com&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Message-Id: &lt;20221022150508.26830-29-shentey@gmail.com&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
</content>
</entry>
<entry>
<title>hw/mips/malta: Reuse dev variable</title>
<updated>2022-10-31T10:32:07+00:00</updated>
<author>
<name>Bernhard Beschow</name>
</author>
<published>2022-10-22T15:04:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=e5b6c3e2fe0564306c71ec322717101aa88835c7'/>
<id>urn:sha1:e5b6c3e2fe0564306c71ec322717101aa88835c7</id>
<content type='text'>
While at it, move the assignments closer to where they are used.

Signed-off-by: Bernhard Beschow &lt;shentey@gmail.com&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
Message-Id: &lt;20221022150508.26830-26-shentey@gmail.com&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;philmd@linaro.org&gt;
</content>
</entry>
<entry>
<title>hw: Remove unused MAX_IDE_BUS define</title>
<updated>2022-10-31T10:32:07+00:00</updated>
<author>
<name>BALATON Zoltan</name>
</author>
<published>2022-09-17T11:51:36+00:00</published>
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<id>urn:sha1:8466405eb0c77d81be5f8c2e3608fdfeb00bb1b9</id>
<content type='text'>
Several machines have an unused MAX_IDE_BUS define. Remove it from
these machines that don't need it.

Signed-off-by: BALATON Zoltan &lt;balaton@eik.bme.hu&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Message-Id: &lt;20220917115136.A32EF746E06@zero.eik.bme.hu&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
</content>
</entry>
<entry>
<title>hw/isa/vt82c686: Create rtc-time alias in boards instead</title>
<updated>2022-10-31T10:32:07+00:00</updated>
<author>
<name>Bernhard Beschow</name>
</author>
<published>2022-09-01T11:41:27+00:00</published>
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<id>urn:sha1:ff9105dabc5edeab8328e0b639a21c7ef555161e</id>
<content type='text'>
According to good QOM practice, an object should only deal with objects
of its own sub tree. Having devices create an alias on the machine
object doesn't respect this good practice. To resolve this, create the
alias in the machine's code.

Signed-off-by: Bernhard Beschow &lt;shentey@gmail.com&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Acked-by: Daniel Henrique Barboza &lt;danielhb413@gmail.com&gt;
Message-Id: &lt;20220901114127.53914-14-shentey@gmail.com&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
</content>
</entry>
<entry>
<title>hw/mips/fuloong2e: Inline vt82c686b_southbridge_init() and remove it</title>
<updated>2022-10-31T10:32:07+00:00</updated>
<author>
<name>Bernhard Beschow</name>
</author>
<published>2022-09-01T11:41:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=4ff5328bf7d503805cc1baba9e4de47216f407d0'/>
<id>urn:sha1:4ff5328bf7d503805cc1baba9e4de47216f407d0</id>
<content type='text'>
The previous patches moved most of this function into the via-isa device
model such that it has become fairly trivial. So inline it for
simplicity.

Suggested-by: BALATON Zoltan &lt;balaton@eik.bme.hu&gt;
Signed-off-by: Bernhard Beschow &lt;shentey@gmail.com&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Message-Id: &lt;20220901114127.53914-12-shentey@gmail.com&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
</content>
</entry>
<entry>
<title>hw/isa/vt82c686: Instantiate AC97 and MC97 functions in host device</title>
<updated>2022-10-31T10:32:07+00:00</updated>
<author>
<name>Bernhard Beschow</name>
</author>
<published>2022-09-01T11:41:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=0a8d405d69394f84a28cde79949612ec36d3fcda'/>
<id>urn:sha1:0a8d405d69394f84a28cde79949612ec36d3fcda</id>
<content type='text'>
The AC97 function's wakeup status is wired to the PM function and both
the AC97 and MC97 interrupt routing is determined by the ISA function.

Signed-off-by: Bernhard Beschow &lt;shentey@gmail.com&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Acked-by: Daniel Henrique Barboza &lt;danielhb413@gmail.com&gt;
Message-Id: &lt;20220901114127.53914-11-shentey@gmail.com&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
</content>
</entry>
</feed>
