bwlp/qemu.git/hw/misc/trace-events, branch spice_video_codecs

hw/misc/grlib_ahb_apb_pnp: Support 8 and 16 bit accesses

2022-08-08T21:43:11+00:00

In real hardware, the APB and AHB PNP data tables can be accessed with byte and halfword reads as well as word reads. Our implementation currently only handles word reads. Add support for the 8 and 16 bit accesses. Note that we only need to handle aligned accesses -- unaligned accesses should continue to trap, as happens on hardware. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1132 Signed-off-by: Peter Maydell Reviewed-by: Frederic Konrad Message-Id: <20220802131925.3380923-1-peter.maydell@linaro.org> Tested-by: Tomasz Martyniak Signed-off-by: Philippe Mathieu-Daudé

hw/misc/aspeed: Add PECI controller

2022-06-30T07:21:14+00:00

This introduces a really basic PECI controller that responses to commands by always setting the response code to success and then raising an interrupt to indicate the command is done. This helps avoid getting hit with constant errors if the driver continuously attempts to send a command and keeps timing out. The AST2400 and AST2500 only included registers up to 0x5C, not 0xFC. They supported PECI 1.1, 2.0, and 3.0. The AST2600 and AST1030 support PECI 4.0, which includes more read/write buffer registers from 0x80 to 0xFC to support 64-byte mode. This patch doesn't attempt to handle that, or to create a different version of the controller for the different generations, since it's only implementing functionality that is common to all generations. The basic sequence of events is that the firmware will read and write to various registers and then trigger a command by setting the FIRE bit in the command register (similar to the I2C controller). Then the firmware waits for an interrupt from the PECI controller, expecting the interrupt status register to be filled in with info on what happened. If the command was transmitted and received successfully, then response codes from the host CPU will be found in the data buffer registers. Signed-off-by: Peter Delevoryas Reviewed-by: Cédric Le Goater Message-Id: <20220630045133.32251-12-me@pjd.dev> [ clg: s/sysbus_mmio_map/aspeed_mmio_map/ ] Signed-off-by: Cédric Le Goater

aspeed/scu: Add trace events for read ops

2022-06-30T07:21:13+00:00

Reviewed-by: Peter Delevoryas Message-Id: <20220628154740.1117349-2-clg@kaod.org> Signed-off-by: Cédric Le Goater

lasi: move from hw/hppa to hw/misc

2022-05-08T17:52:37+00:00

Move the LASI device implementation from hw/hppa to hw/misc so that it is located with all the other miscellaneous devices. Signed-off-by: Mark Cave-Ayland Acked-by: Helge Deller Message-Id: <20220504092600.10048-43-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland

hw: Fix misleading hexadecimal format

2022-03-24T10:38:42+00:00

"0x%u" format is very misleading, replace by "0x%x". Found running: $ git grep -E '0x%[0-9]*([lL]*|" ?PRI)[dDuU]' hw/ Inspired-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Daniel P. Berrangé Message-id: 20220323114718.58714-3-philippe.mathieu.daude@gmail.com Signed-off-by: Stefan Hajnoczi

mos6522: add register names to register read/write trace events

2022-03-09T09:28:28+00:00

This helps to follow how the guest is programming the mos6522 when debugging. Signed-off-by: Mark Cave-Ayland Reviewed-by: Peter Maydell Reviewed-by: Laurent Vivier Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20220305150957.5053-8-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland

aspeed/sdmc: Add trace events

2022-02-26T17:40:51+00:00

This is useful to analyze changes in the U-Boot RAM driver when SDRAM training is performed. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Cédric Le Goater

hw/misc/aspeed_i3c.c: Introduce a dummy AST2600 I3C model.

2022-01-20T11:47:53+00:00

Aspeed 2600 SDK enables I3C support by default. The I3C driver will try to reset the device controller and set it up through device address table register. This dummy model responds to these registers with default values as listed in the ast2600v10 datasheet chapter 54.2. This avoids a guest machine kernel panic due to referencing an invalid kernel address if the device address table register isn't set correctly. Signed-off-by: Troy Lee Reviewed-by: Graeme Gregory Reviewed-by: Cédric Le Goater Tested-by: Graeme Gregory Message-id: 20220111084546.4145785-2-troy_lee@aspeedtech.com [PMM: tidied commit message; fixed format strings] Signed-off-by: Peter Maydell

mac_via: add GPIO for A/UX mode

2021-10-20T14:18:40+00:00

Add a new auxmode GPIO that is updated when port B bit 6 is changed indicating whether the hardware is configured for A/UX mode. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Message-Id: <20211020134131.4392-5-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier

docs: fix references to docs/devel/tracing.rst

2021-06-02T04:51:09+00:00

Commit e50caf4a5c ("tracing: convert documentation to rST") converted docs/devel/tracing.txt to docs/devel/tracing.rst. We still have several references to the old file, so let's fix them with the following command: sed -i s/tracing.txt/tracing.rst/ $(git grep -l docs/devel/tracing.txt) Signed-off-by: Stefano Garzarella Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20210517151702.109066-2-sgarzare@redhat.com> Signed-off-by: Thomas Huth