<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bwlp/qemu.git/hw/ssi, branch spice_video_codecs</title>
<subtitle>Experimental fork of QEMU with video encoding patches</subtitle>
<id>https://git.openslx.org/bwlp/qemu.git/atom/hw/ssi?h=spice_video_codecs</id>
<link rel='self' href='https://git.openslx.org/bwlp/qemu.git/atom/hw/ssi?h=spice_video_codecs'/>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/'/>
<updated>2022-10-24T09:20:15+00:00</updated>
<entry>
<title>aspeed/smc: Cache AspeedSMCClass</title>
<updated>2022-10-24T09:20:15+00:00</updated>
<author>
<name>Cédric Le Goater</name>
</author>
<published>2022-10-24T09:20:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=b84a9482a3c9e3b6fbdf1fd4b0477e4a7a51683e'/>
<id>urn:sha1:b84a9482a3c9e3b6fbdf1fd4b0477e4a7a51683e</id>
<content type='text'>
Store a reference on the AspeedSMC class under the flash object and
use it when accessing the flash contents. Avoiding the class cast
checkers in these hot paths improves performance by 10% when running
the aspeed avocado tests.

Message-Id: &lt;20220923084803.498337-7-clg@kaod.org&gt;
Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
</content>
</entry>
<entry>
<title>ssi: cache SSIPeripheralClass to avoid GET_CLASS()</title>
<updated>2022-10-24T09:20:15+00:00</updated>
<author>
<name>Alex Bennée</name>
</author>
<published>2022-10-24T09:20:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=db96605a49b334eeb2a5d1cc12981778f7d792aa'/>
<id>urn:sha1:db96605a49b334eeb2a5d1cc12981778f7d792aa</id>
<content type='text'>
Investigating why some BMC models are so slow compared to a plain ARM
virt machines I did some profiling of:

  ./qemu-system-arm -M romulus-bmc -nic user \
    -drive
    file=obmc-phosphor-image-romulus.static.mtd,format=raw,if=mtd \
    -nographic -serial mon:stdio

And saw that object_class_dynamic_cast_assert was dominating the
profile times. We have a number of cases in this model of the SSI bus.
As the class is static once the object is created we just cache it and
use it instead of the dynamic case macros.

Profiling against:

  ./tests/venv/bin/avocado run \
    tests/avocado/machine_aspeed.py:test_arm_ast2500_romulus_openbmc_v2_9_0

Before: 35.565 s ±  0.087 s
After: 15.713 s ±  0.287 s

Signed-off-by: Alex Bennée &lt;alex.bennee@linaro.org&gt;
Cc: Cédric Le Goater &lt;clg@kaod.org&gt;
Tested-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Reviewed-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Message-Id: &lt;20220811151413.3350684-6-alex.bennee@linaro.org&gt;
Message-Id: &lt;20220923084803.498337-6-clg@kaod.org&gt;
Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
</content>
</entry>
<entry>
<title>hw/ssi: ibex_spi: fixup/add rw1c functionality</title>
<updated>2022-10-14T04:29:50+00:00</updated>
<author>
<name>Wilfred Mallawa</name>
</author>
<published>2022-09-30T03:32:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=6c1876958bbb53396655777401ab34207d0e1afa'/>
<id>urn:sha1:6c1876958bbb53396655777401ab34207d0e1afa</id>
<content type='text'>
This patch adds the `rw1c` functionality to the respective
registers. The status fields are cleared when the respective
field is set.

Signed-off-by: Wilfred Mallawa &lt;wilfred.mallawa@wdc.com&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Message-Id: &lt;20220930033241.206581-3-wilfred.mallawa@opensource.wdc.com&gt;
Signed-off-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
</content>
</entry>
<entry>
<title>hw/ssi: ibex_spi: fixup coverity issue</title>
<updated>2022-10-14T04:29:50+00:00</updated>
<author>
<name>Wilfred Mallawa</name>
</author>
<published>2022-09-30T03:32:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=ff3809ef34d39a2b42f0ced5f5f90c36bd550cc9'/>
<id>urn:sha1:ff3809ef34d39a2b42f0ced5f5f90c36bd550cc9</id>
<content type='text'>
This patch addresses the coverity issues specified in [1],
as suggested, `FIELD_DP32()`/`FIELD_EX32()` macros have been
implemented to clean up the code.

[1] https://www.mail-archive.com/qemu-devel@nongnu.org/msg887713.html

Fixes: Coverity CID 1488107

Signed-off-by: Wilfred Mallawa &lt;wilfred.mallawa@wdc.com&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Reviewed-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
Message-Id: &lt;20220930033241.206581-2-wilfred.mallawa@opensource.wdc.com&gt;
Signed-off-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
</content>
</entry>
<entry>
<title>hw/ssi: ibex_spi: update reg addr</title>
<updated>2022-09-26T21:04:38+00:00</updated>
<author>
<name>Wilfred Mallawa</name>
</author>
<published>2022-08-23T06:12:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=7a426f83c3192db8006ce29abc702dfa2eb00fc8'/>
<id>urn:sha1:7a426f83c3192db8006ce29abc702dfa2eb00fc8</id>
<content type='text'>
Updates the `EVENT_ENABLE` register to offset `0x34` as per
OpenTitan spec [1].

[1] https://docs.opentitan.org/hw/ip/spi_host/doc/#Reg_event_enable

Signed-off-by: Wilfred Mallawa &lt;wilfred.mallawa@wdc.com&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Message-Id: &lt;20220823061201.132342-5-wilfred.mallawa@opensource.wdc.com&gt;
Signed-off-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
</content>
</entry>
<entry>
<title>hw/ssi: ibex_spi: fixup typos in ibex_spi_host</title>
<updated>2022-09-26T21:04:38+00:00</updated>
<author>
<name>Wilfred Mallawa</name>
</author>
<published>2022-08-23T06:12:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=a44558636aed935579701e7805684d1138383c7d'/>
<id>urn:sha1:a44558636aed935579701e7805684d1138383c7d</id>
<content type='text'>
This patch fixes up minor typos in ibex_spi_host

Signed-off-by: Wilfred Mallawa &lt;wilfred.mallawa@wdc.com&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Reviewed-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
Message-Id: &lt;20220823061201.132342-2-wilfred.mallawa@opensource.wdc.com&gt;
Signed-off-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
</content>
</entry>
<entry>
<title>aspeed/smc: Fix potential overflow</title>
<updated>2022-06-30T07:21:13+00:00</updated>
<author>
<name>Cédric Le Goater</name>
</author>
<published>2022-06-30T07:21:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=75dbf30be85f5163814b61aae87f93898d5fc53d'/>
<id>urn:sha1:75dbf30be85f5163814b61aae87f93898d5fc53d</id>
<content type='text'>
Coverity warns that "ssi_transfer(s-&gt;spi, 0U) &lt;&lt; 8 * i" might overflow
because the expression is evaluated using 32-bit arithmetic and then
used in a context expecting a uint64_t.

Fixes: Coverity CID 1487244
Message-Id: &lt;20220628165512.1133590-1-clg@kaod.org&gt;
Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
</content>
</entry>
<entry>
<title>aspeed/smc: Add AST1030 support</title>
<updated>2022-05-02T15:03:03+00:00</updated>
<author>
<name>Steven Lee</name>
</author>
<published>2022-05-02T15:03:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=2850df6a81bcdc2e063dfdd56751ee2d11c58030'/>
<id>urn:sha1:2850df6a81bcdc2e063dfdd56751ee2d11c58030</id>
<content type='text'>
AST1030 spi controller's address decoding unit is 1MB that is identical
to ast2600, but fmc address decoding unit is 512kb.
Introduce seg_to_reg and reg_to_seg handlers for ast1030 fmc controller.
In addition, add ast1030 fmc, spi1, and spi2 class init handler.

Signed-off-by: Troy Lee &lt;troy_lee@aspeedtech.com&gt;
Signed-off-by: Jamin Lin &lt;jamin_lin@aspeedtech.com&gt;
Signed-off-by: Steven Lee &lt;steven_lee@aspeedtech.com&gt;
Reviewed-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Message-Id: &lt;20220401083850.15266-3-jamin_lin@aspeedtech.com&gt;
Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
</content>
</entry>
<entry>
<title>hw/ssi: Add Ibex SPI device model</title>
<updated>2022-04-22T00:35:16+00:00</updated>
<author>
<name>Wilfred Mallawa</name>
</author>
<published>2022-03-03T04:54:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=9c4888c9959ccb8d2e2dc7e0080d48ad1398c036'/>
<id>urn:sha1:9c4888c9959ccb8d2e2dc7e0080d48ad1398c036</id>
<content type='text'>
Adds the SPI_HOST device model for ibex. The device specification is as per
[1]. The model has been tested on opentitan with spi_host unit tests
written for TockOS.

[1] https://docs.opentitan.org/hw/ip/spi_host/doc/

Signed-off-by: Wilfred Mallawa &lt;wilfred.mallawa@wdc.com&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Message-Id: &lt;20220303045426.511588-1-alistair.francis@opensource.wdc.com&gt;
Signed-off-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
</content>
</entry>
<entry>
<title>aspeed/smc: Fix error log</title>
<updated>2022-03-08T08:18:11+00:00</updated>
<author>
<name>Cédric Le Goater</name>
</author>
<published>2022-03-08T08:18:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=c1402ea1226a4dd6f17f071dca8262e858af6008'/>
<id>urn:sha1:c1402ea1226a4dd6f17f071dca8262e858af6008</id>
<content type='text'>
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Message-Id: &lt;20220307071856.1410731-7-clg@kaod.org&gt;
Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
</content>
</entry>
</feed>
