bwlp/qemu.git/hw/timer/trace-events, branch spice_video_codecs

hw/sh4: Change debug printfs to traces

2021-10-30T16:39:37+00:00

Signed-off-by: BALATON Zoltan Reviewed-by: Richard Henderson Message-Id: [PMD: Fixed format strings for 32-bit hosts] Signed-off-by: Philippe Mathieu-Daudé

hw/timer: Add SiFive PWM support

2021-09-20T21:56:49+00:00

This is the initial commit of the SiFive PWM timer. This is used by guest software as a timer and is included in the SiFive FU540 SoC. Signed-off-by: Justin Restivo Signed-off-by: Alexandra Clifford Signed-off-by: Amanda Strnad Signed-off-by: Alistair Francis Reviewed-by: Bin Meng Message-id: 9f70a210acbfaf0e1ea6ad311ab892ac69134d8b.1631159656.git.alistair.francis@wdc.com

docs: fix references to docs/devel/tracing.rst

2021-06-02T04:51:09+00:00

Commit e50caf4a5c ("tracing: convert documentation to rST") converted docs/devel/tracing.txt to docs/devel/tracing.rst. We still have several references to the old file, so let's fix them with the following command: sed -i s/tracing.txt/tracing.rst/ $(git grep -l docs/devel/tracing.txt) Signed-off-by: Stefano Garzarella Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20210517151702.109066-2-sgarzare@redhat.com> Signed-off-by: Thomas Huth

Drop the deprecated lm32 target

2021-05-12T16:20:25+00:00

Target lm32 was deprecated in commit d8498005122, v5.2.0. See there for rationale. Some of its code lives on in device models derived from milkymist ones: hw/char/digic-uart.c and hw/display/bcm2835_fb.c. Cc: Michael Walle Signed-off-by: Markus Armbruster Message-Id: <20210503084034.3804963-2-armbru@redhat.com> Acked-by: Michael Walle [Trivial conflicts resolved, reST markup fixed]

hw/timer/sse-timer: Model the SSE Subsystem System Timer

2021-03-08T17:20:01+00:00

The SSE-300 includes some timers which are a different kind to those in the SSE-200. Model them. These timers are documented in the SSE-123 Example Subsystem Technical Reference Manual: https://developer.arm.com/documentation/101370/latest/ Signed-off-by: Peter Maydell Tested-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-id: 20210219144617.4782-13-peter.maydell@linaro.org

hw/timer/sse-counter: Model the SSE Subsystem System Counter

2021-03-08T17:20:01+00:00

The SSE-300 includes a counter module; implement a model of it. This counter is documented in the SSE-123 Example Subsystem Technical Reference Manual: https://developer.arm.com/documentation/101370/latest/ Signed-off-by: Peter Maydell Tested-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-id: 20210219144617.4782-12-peter.maydell@linaro.org

hw/timer/bcm2835: Support the timer COMPARE registers

2020-10-20T15:12:00+00:00

This peripheral has 1 free-running timer and 4 compare registers. Only the free-running timer is implemented. Add support the COMPARE registers (each register is wired to an IRQ). Reference: "BCM2835 ARM Peripherals" datasheet [*] chapter 12 "System Timer": The System Timer peripheral provides four 32-bit timer channels and a single 64-bit free running counter. Each channel has an output compare register, which is compared against the 32 least significant bits of the free running counter values. When the two values match, the system timer peripheral generates a signal to indicate a match for the appropriate channel. The match signal is then fed into the interrupt controller. This peripheral is used since Linux 3.7, commit ee4af5696720 ("ARM: bcm2835: add system timer"). [*] https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Luc Michel Message-id: 20201010203709.3116542-4-f4bug@amsat.org Signed-off-by: Peter Maydell

hw/timer: Add NPCM7xx Timer device model

2020-09-14T13:24:58+00:00

The NPCM730 and NPCM750 SoCs have three timer modules each holding five timers and some shared registers (e.g. interrupt status). Each timer runs at 25 MHz divided by a prescaler, and counts down from a configurable initial value to zero. When zero is reached, the interrupt flag for the timer is set, and the timer is disabled (one-shot mode) or reloaded from its initial value (periodic mode). This implementation is sufficient to boot a Linux kernel configured for NPCM750. Note that the kernel does not seem to actually turn on the interrupts. Reviewed-by: Tyrone Ting Reviewed-by: Joel Stanley Reviewed-by: Philippe Mathieu-Daudé Tested-by: Alexander Bulekov Tested-by: Philippe Mathieu-Daudé Signed-off-by: Havard Skinnemoen Message-id: 20200911052101.2602693-4-hskinnemoen@google.com Signed-off-by: Peter Maydell

trace-events: Delete unused trace points

2020-09-09T16:17:02+00:00

Tracked down with the help of scripts/cleanup-trace-events.pl. Signed-off-by: Markus Armbruster Message-id: 20200806141334.3646302-4-armbru@redhat.com Signed-off-by: Stefan Hajnoczi

hw/timer: avr: Add limited support for 16-bit timer peripheral

2020-07-11T09:02:05+00:00

These were designed to facilitate testing but should provide enough function to be useful in other contexts. Only a subset of the functions of each peripheral is implemented, mainly due to the lack of a standard way to handle electrical connections (like GPIO pins). [AM: Remove word 'Atmel' from filenames and all elements of code] Suggested-by: Aleksandar Markovic Signed-off-by: Sarah Harris Signed-off-by: Ed Robbins Signed-off-by: Philippe Mathieu-Daudé [rth: Squash info mtree fixes and a file rename from f4bug] Signed-off-by: Richard Henderson [PMD: Use qemu_log_mask(LOG_UNIMP), replace goto by return] Signed-off-by: Aleksandar Markovic Reviewed-by: Alex Bennée Signed-off-by: Thomas Huth Message-Id: <20200705140315.260514-21-huth@tuxfamily.org> [PMD: Check cpu-frequency-hz property in realize()] Signed-off-by: Philippe Mathieu-Daudé