<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bwlp/qemu.git/include/hw/nvram, branch spice_video_codecs</title>
<subtitle>Experimental fork of QEMU with video encoding patches</subtitle>
<id>https://git.openslx.org/bwlp/qemu.git/atom/include/hw/nvram?h=spice_video_codecs</id>
<link rel='self' href='https://git.openslx.org/bwlp/qemu.git/atom/include/hw/nvram?h=spice_video_codecs'/>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/'/>
<updated>2022-10-31T18:48:23+00:00</updated>
<entry>
<title>mac_nvram: Use NVRAM_SIZE constant</title>
<updated>2022-10-31T18:48:23+00:00</updated>
<author>
<name>BALATON Zoltan</name>
</author>
<published>2022-10-28T11:56:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=458586fe19585d6949c79c898e2181048565c774'/>
<id>urn:sha1:458586fe19585d6949c79c898e2181048565c774</id>
<content type='text'>
The NVRAM_SIZE constant was defined but not used. Rename it to
MACIO_NVRAM_SIZE to match the device model and use it where appropriate.

Signed-off-by: BALATON Zoltan &lt;balaton@eik.bme.hu&gt;
Reviewed-by: Mark Cave-Ayland &lt;mark.cave-ayland@ilande.co.uk&gt;
Message-Id: &lt;5b53c70438dfb46837af8a094e753706b06c4ec6.1666957578.git.balaton@eik.bme.hu&gt;
Signed-off-by: Mark Cave-Ayland &lt;mark.cave-ayland@ilande.co.uk&gt;
</content>
</entry>
<entry>
<title>hw/ppc/mac.h: Rename to include/hw/nvram/mac_nvram.h</title>
<updated>2022-10-31T18:48:23+00:00</updated>
<author>
<name>BALATON Zoltan</name>
</author>
<published>2022-10-28T11:56:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=443f07b73d139e6944bc6af472b6e9df790b6e38'/>
<id>urn:sha1:443f07b73d139e6944bc6af472b6e9df790b6e38</id>
<content type='text'>
All that is left in mac.h now belongs to the nvram emulation so rename
it accordingly and only include it where it is really used.

Signed-off-by: BALATON Zoltan &lt;balaton@eik.bme.hu&gt;
Reviewed-by: Mark Cave-Ayland &lt;mark.cave-ayland@ilande.co.uk&gt;
Message-Id: &lt;b82449369f718c0e207fe8c332fab550fa0230c0.1666957578.git.balaton@eik.bme.hu&gt;
Signed-off-by: Mark Cave-Ayland &lt;mark.cave-ayland@ilande.co.uk&gt;
</content>
</entry>
<entry>
<title>hw/arm, loongarch: Move load_image_to_fw_cfg() to common location</title>
<updated>2022-10-14T04:29:50+00:00</updated>
<author>
<name>Sunil V L</name>
</author>
<published>2022-10-04T09:23:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=785a7383dd4832cc772a2c5483bd6fa40ee51302'/>
<id>urn:sha1:785a7383dd4832cc772a2c5483bd6fa40ee51302</id>
<content type='text'>
load_image_to_fw_cfg() is duplicated by both arm and loongarch. The same
function will be required by riscv too. So, it's time to refactor and
move this function to a common path.

Signed-off-by: Sunil V L &lt;sunilvl@ventanamicro.com&gt;
Reviewed-by: Andrew Jones &lt;ajones@ventanamicro.com&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Reviewed-by: Song Gao &lt;gaosong@loongson.cn&gt;
Message-Id: &lt;20221004092351.18209-2-sunilvl@ventanamicro.com&gt;
Signed-off-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
</content>
</entry>
<entry>
<title>x86: return modified setup_data only if read as memory, not as file</title>
<updated>2022-09-27T09:30:59+00:00</updated>
<author>
<name>Jason A. Donenfeld</name>
</author>
<published>2022-09-21T09:31:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=e935b735085dfa61d8e6d276b6f9e7687796a3c7'/>
<id>urn:sha1:e935b735085dfa61d8e6d276b6f9e7687796a3c7</id>
<content type='text'>
If setup_data is being read into a specific memory location, then
generally the setup_data address parameter is read first, so that the
caller knows where to read it into. In that case, we should return
setup_data containing the absolute addresses that are hard coded and
determined a priori. This is the case when kernels are loaded by BIOS,
for example. In contrast, when setup_data is read as a file, then we
shouldn't modify setup_data, since the absolute address will be wrong by
definition. This is the case when OVMF loads the image.

This allows setup_data to be used like normal, without crashing when EFI
tries to use it.

(As a small development note, strangely, fw_cfg_add_file_callback() was
exported but fw_cfg_add_bytes_callback() wasn't, so this makes that
consistent.)

Cc: Gerd Hoffmann &lt;kraxel@redhat.com&gt;
Cc: Laurent Vivier &lt;laurent@vivier.eu&gt;
Cc: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Cc: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
Cc: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Cc: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Cc: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Suggested-by: Ard Biesheuvel &lt;ardb@kernel.org&gt;
Reviewed-by: Ard Biesheuvel &lt;ardb@kernel.org&gt;
Signed-off-by: Jason A. Donenfeld &lt;Jason@zx2c4.com&gt;
Message-Id: &lt;20220921093134.2936487-1-Jason@zx2c4.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>hw/nvram: Introduce Xilinx battery-backed ram</title>
<updated>2021-09-30T12:42:10+00:00</updated>
<author>
<name>Tong Ho</name>
</author>
<published>2021-09-17T05:23:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=461a6a6f199944e466ddb808516e63cf064c0105'/>
<id>urn:sha1:461a6a6f199944e466ddb808516e63cf064c0105</id>
<content type='text'>
This device is present in Versal and ZynqMP product
families to store a 256-bit encryption key.

Co-authored-by: Edgar E. Iglesias &lt;edgar.iglesias@xilinx.com&gt;
Co-authored-by: Sai Pavan Boddu &lt;sai.pavan.boddu@xilinx.com&gt;

Signed-off-by: Edgar E. Iglesias &lt;edgar.iglesias@xilinx.com&gt;
Signed-off-by: Sai Pavan Boddu &lt;sai.pavan.boddu@xilinx.com&gt;
Signed-off-by: Tong Ho &lt;tong.ho@xilinx.com&gt;
Message-id: 20210917052400.1249094-5-tong.ho@xilinx.com
Reviewed-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Signed-off-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
</content>
</entry>
<entry>
<title>hw/nvram: Introduce Xilinx ZynqMP eFuse device</title>
<updated>2021-09-30T12:42:10+00:00</updated>
<author>
<name>Tong Ho</name>
</author>
<published>2021-09-17T05:23:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=67fa02f89fbf7510b70080bbbea8ac0aa752e8ba'/>
<id>urn:sha1:67fa02f89fbf7510b70080bbbea8ac0aa752e8ba</id>
<content type='text'>
This implements the Xilinx ZynqMP eFuse, an one-time
field-programmable non-volatile storage device.  There is
only one such device in the Xilinx ZynqMP product family.

Co-authored-by: Edgar E. Iglesias &lt;edgar.iglesias@xilinx.com&gt;
Co-authored-by: Sai Pavan Boddu &lt;sai.pavan.boddu@xilinx.com&gt;

Signed-off-by: Edgar E. Iglesias &lt;edgar.iglesias@xilinx.com&gt;
Signed-off-by: Sai Pavan Boddu &lt;sai.pavan.boddu@xilinx.com&gt;
Signed-off-by: Tong Ho &lt;tong.ho@xilinx.com&gt;
Message-id: 20210917052400.1249094-4-tong.ho@xilinx.com
Reviewed-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Signed-off-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
</content>
</entry>
<entry>
<title>hw/nvram: Introduce Xilinx Versal eFuse device</title>
<updated>2021-09-30T12:42:10+00:00</updated>
<author>
<name>Tong Ho</name>
</author>
<published>2021-09-17T05:23:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=9e4aa1fafef624ee4ae6006497bed0cc112135d3'/>
<id>urn:sha1:9e4aa1fafef624ee4ae6006497bed0cc112135d3</id>
<content type='text'>
This implements the Xilinx Versal eFuse, an one-time
field-programmable non-volatile storage device.  There is
only one such device in the Xilinx Versal product family.

This device has two separate mmio interfaces, a controller
and a flatten readback.

The controller provides interfaces for field-programming,
configuration, control, and status.

The flatten readback is a cache to provide a byte-accessible
read-only interface to efficiently read efuse array.

Co-authored-by: Edgar E. Iglesias &lt;edgar.iglesias@xilinx.com&gt;
Co-authored-by: Sai Pavan Boddu &lt;sai.pavan.boddu@xilinx.com&gt;

Signed-off-by: Edgar E. Iglesias &lt;edgar.iglesias@xilinx.com&gt;
Signed-off-by: Sai Pavan Boddu &lt;sai.pavan.boddu@xilinx.com&gt;
Signed-off-by: Tong Ho &lt;tong.ho@xilinx.com&gt;
Message-id: 20210917052400.1249094-3-tong.ho@xilinx.com
Reviewed-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Signed-off-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
</content>
</entry>
<entry>
<title>hw/nvram: Introduce Xilinx eFuse QOM</title>
<updated>2021-09-30T12:42:09+00:00</updated>
<author>
<name>Tong Ho</name>
</author>
<published>2021-09-17T05:23:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=68fbcc344ef6fb2dff0eb4cac0319ea7af010a7f'/>
<id>urn:sha1:68fbcc344ef6fb2dff0eb4cac0319ea7af010a7f</id>
<content type='text'>
This introduces the QOM for Xilinx eFuse, an one-time
field-programmable storage bit array.

The actual mmio interface to the array varies by device
families and will be provided in different change-sets.

Co-authored-by: Edgar E. Iglesias &lt;edgar.iglesias@xilinx.com&gt;
Co-authored-by: Sai Pavan Boddu &lt;sai.pavan.boddu@xilinx.com&gt;

Signed-off-by: Edgar E. Iglesias &lt;edgar.iglesias@xilinx.com&gt;
Signed-off-by: Sai Pavan Boddu &lt;sai.pavan.boddu@xilinx.com&gt;
Signed-off-by: Tong Ho &lt;tong.ho@xilinx.com&gt;
Message-id: 20210917052400.1249094-2-tong.ho@xilinx.com
Reviewed-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Signed-off-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
</content>
</entry>
<entry>
<title>fw_cfg: Refactor extra pci roots addition</title>
<updated>2020-12-08T18:48:57+00:00</updated>
<author>
<name>Jiahui Cen</name>
</author>
<published>2020-11-19T01:48:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=0abd38885ac0fcdb08653922f339849cad387961'/>
<id>urn:sha1:0abd38885ac0fcdb08653922f339849cad387961</id>
<content type='text'>
Extract extra pci roots addition from pc machine, which could be used by
other machines.

In order to make uefi get the extra roots, it is necessary to write extra
roots into fw_cfg. And only if the uefi knows there are extra roots,
the config spaces of devices behind the root could be obtained.

Signed-off-by: Jiahui Cen &lt;cenjiahui@huawei.com&gt;
Signed-off-by: Yubo Miao &lt;miaoyubo@huawei.com&gt;
Message-Id: &lt;20201119014841.7298-3-cenjiahui@huawei.com&gt;
Reviewed-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Signed-off-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
</content>
</entry>
<entry>
<title>Use OBJECT_DECLARE_SIMPLE_TYPE when possible</title>
<updated>2020-09-18T18:12:32+00:00</updated>
<author>
<name>Eduardo Habkost</name>
</author>
<published>2020-09-16T18:25:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=8063396bf3459a810d24e3efd6110b8480f0de5b'/>
<id>urn:sha1:8063396bf3459a810d24e3efd6110b8480f0de5b</id>
<content type='text'>
This converts existing DECLARE_INSTANCE_CHECKER usage to
OBJECT_DECLARE_SIMPLE_TYPE when possible.

$ ./scripts/codeconverter/converter.py -i \
  --pattern=AddObjectDeclareSimpleType $(git grep -l '' -- '*.[ch]')

Signed-off-by: Eduardo Habkost &lt;ehabkost@redhat.com&gt;
Acked-by: Paul Durrant &lt;paul@xen.org&gt;
Message-Id: &lt;20200916182519.415636-6-ehabkost@redhat.com&gt;
Signed-off-by: Eduardo Habkost &lt;ehabkost@redhat.com&gt;
</content>
</entry>
</feed>
