<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bwlp/qemu.git/include/hw/pci-host, branch spice_video_codecs</title>
<subtitle>Experimental fork of QEMU with video encoding patches</subtitle>
<id>https://git.openslx.org/bwlp/qemu.git/atom/include/hw/pci-host?h=spice_video_codecs</id>
<link rel='self' href='https://git.openslx.org/bwlp/qemu.git/atom/include/hw/pci-host?h=spice_video_codecs'/>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/'/>
<updated>2022-11-04T09:07:40+00:00</updated>
<entry>
<title>hw/loongarch: Improve fdt for LoongArch virt machine</title>
<updated>2022-11-04T09:07:40+00:00</updated>
<author>
<name>Xiaojuan Yang</name>
</author>
<published>2022-10-28T01:40:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=ca5bf7ad0222ad4a884c90a821a22000d918c54e'/>
<id>urn:sha1:ca5bf7ad0222ad4a884c90a821a22000d918c54e</id>
<content type='text'>
Add new items into LoongArch FDT, including rtc and uart info.

Signed-off-by: Xiaojuan Yang &lt;yangxiaojuan@loongson.cn&gt;
Reviewed-by: Song Gao &lt;gaosong@loongson.cn&gt;
Message-Id: &lt;20221028014007.2718352-3-yangxiaojuan@loongson.cn&gt;
Signed-off-by: Song Gao &lt;gaosong@loongson.cn&gt;
</content>
</entry>
<entry>
<title>hw/ppc/mac.h: Move grackle-pcihost type declaration out to a header</title>
<updated>2022-10-31T18:48:23+00:00</updated>
<author>
<name>BALATON Zoltan</name>
</author>
<published>2022-10-28T11:56:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=87e5a4f8c23236a559c63ca089c35d3e6066d3df'/>
<id>urn:sha1:87e5a4f8c23236a559c63ca089c35d3e6066d3df</id>
<content type='text'>
Signed-off-by: BALATON Zoltan &lt;balaton@eik.bme.hu&gt;
Reviewed-by: Mark Cave-Ayland &lt;mark.cave-ayland@ilande.co.uk&gt;
Message-Id: &lt;b133a84dfd38366eea2bb11b7ca433758efacc10.1666957578.git.balaton@eik.bme.hu&gt;
Signed-off-by: Mark Cave-Ayland &lt;mark.cave-ayland@ilande.co.uk&gt;
</content>
</entry>
<entry>
<title>hw/loongarch: Add platform bus support</title>
<updated>2022-09-20T07:44:24+00:00</updated>
<author>
<name>Xiaojuan Yang</name>
</author>
<published>2022-08-10T07:50:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=a1f7d78e564a453ea07159efaa1af9a7210ddeda'/>
<id>urn:sha1:a1f7d78e564a453ea07159efaa1af9a7210ddeda</id>
<content type='text'>
Add platform bus support and add the bus information such as address,
size, irq number to FDT table.

Signed-off-by: Xiaojuan Yang &lt;yangxiaojuan@loongson.cn&gt;
Acked-by: Song Gao &lt;gaosong@loongson.cn&gt;
Message-Id: &lt;20220908094623.73051-5-yangxiaojuan@loongson.cn&gt;
Signed-off-by: Song Gao &lt;gaosong@loongson.cn&gt;
</content>
</entry>
<entry>
<title>ppc/pnv: add phb-id/chip-id PnvPHB4RootBus properties</title>
<updated>2022-08-31T17:08:05+00:00</updated>
<author>
<name>Daniel Henrique Barboza</name>
</author>
<published>2022-08-11T16:39:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=b7c1750dc440bb46ddc38dd0c391d6394db7bdb1'/>
<id>urn:sha1:b7c1750dc440bb46ddc38dd0c391d6394db7bdb1</id>
<content type='text'>
The same rationale provided in the PHB3 bus case applies here.

Note: we could have merged both buses in a single object, like we did
with the root ports, and spare some boilerplate. The reason we opted to
preserve both buses objects is twofold:

- there's not user side advantage in doing so. Unifying the root ports
presents a clear user QOL change when we enable user created devices back.
The buses objects, aside from having a different QOM name, is transparent
to the user;

- we leave a door opened in case we want to increase the root port limit
for phb4/5 later on without having to deal with phb3 code.

Reviewed-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Signed-off-by: Daniel Henrique Barboza &lt;danielhb413@gmail.com&gt;
Reviewed-by: Frederic Barrat &lt;fbarrat@linux.ibm.com&gt;
Message-Id: &lt;20220811163950.578927-3-danielhb413@gmail.com&gt;
</content>
</entry>
<entry>
<title>ppc/pnv: add phb-id/chip-id PnvPHB3RootBus properties</title>
<updated>2022-08-31T17:08:05+00:00</updated>
<author>
<name>Daniel Henrique Barboza</name>
</author>
<published>2022-08-11T16:39:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=8ec1e4f1ef974e901b416fef6c3b38a5cc2eeffa'/>
<id>urn:sha1:8ec1e4f1ef974e901b416fef6c3b38a5cc2eeffa</id>
<content type='text'>
We rely on the phb-id and chip-id, which are PHB properties, to assign
chassis and slot to the root port. For default devices this is no big
deal: the root port is being created under pnv_phb_realize() and the
values are being passed on via the 'index' and 'chip-id' of the
pnv_phb_attach_root_port() helper.

If we want to implement user created root ports we have a problem. The
user created root port will not be aware of which PHB it belongs to,
unless we're willing to violate QOM best practices and access the PHB
via dev-&gt;parent_bus-&gt;parent. What we can do is to access the root bus
parent bus.

Since we're already assigning the root port as QOM child of the bus, and
the bus is initiated using PHB properties, let's add phb-id and chip-id
as properties of the bus. This will allow us trivial access to them, for
both user-created and default root ports, without doing anything too
shady with QOM.

Reviewed-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Signed-off-by: Daniel Henrique Barboza &lt;danielhb413@gmail.com&gt;
Reviewed-by: Frederic Barrat &lt;fbarrat@linux.ibm.com&gt;
Message-Id: &lt;20220811163950.578927-2-danielhb413@gmail.com&gt;
</content>
</entry>
<entry>
<title>ppc/pnv: remove PnvPHB4.version</title>
<updated>2022-08-31T17:08:05+00:00</updated>
<author>
<name>Daniel Henrique Barboza</name>
</author>
<published>2022-06-24T08:49:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=d69db7dadfe7fd13731a9621520ffb2f382f1675'/>
<id>urn:sha1:d69db7dadfe7fd13731a9621520ffb2f382f1675</id>
<content type='text'>
It's unused.

Signed-off-by: Daniel Henrique Barboza &lt;danielhb413@gmail.com&gt;
Reviewed-by: Frederic Barrat &lt;fbarrat@linux.ibm.com&gt;
Message-Id: &lt;20220624084921.399219-12-danielhb413@gmail.com&gt;
</content>
</entry>
<entry>
<title>ppc/pnv: remove pecc-&gt;rp_model</title>
<updated>2022-08-31T17:08:05+00:00</updated>
<author>
<name>Daniel Henrique Barboza</name>
</author>
<published>2022-06-24T08:49:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=cb6a5c26446f797252a479f456da030dc7febb20'/>
<id>urn:sha1:cb6a5c26446f797252a479f456da030dc7febb20</id>
<content type='text'>
The attribute is unused.

Signed-off-by: Daniel Henrique Barboza &lt;danielhb413@gmail.com&gt;
Reviewed-by: Frederic Barrat &lt;fbarrat@linux.ibm.com&gt;
Message-Id: &lt;20220624084921.399219-11-danielhb413@gmail.com&gt;
</content>
</entry>
<entry>
<title>ppc/pnv: remove pnv-phb4-root-port</title>
<updated>2022-08-31T17:08:05+00:00</updated>
<author>
<name>Daniel Henrique Barboza</name>
</author>
<published>2022-06-24T08:49:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=c8d14603e998ee41313e989cec590c3ec8ddc923'/>
<id>urn:sha1:c8d14603e998ee41313e989cec590c3ec8ddc923</id>
<content type='text'>
The unified pnv-phb-root-port can be used instead. The phb4-root-port
device isn't exposed to the user in any official QEMU release so there's
no ABI breakage in removing it.

Signed-off-by: Daniel Henrique Barboza &lt;danielhb413@gmail.com&gt;
Reviewed-by: Frederic Barrat &lt;fbarrat@linux.ibm.com&gt;
Message-Id: &lt;20220624084921.399219-9-danielhb413@gmail.com&gt;
</content>
</entry>
<entry>
<title>ppc/pnv: remove pnv-phb3-root-port</title>
<updated>2022-08-31T17:08:05+00:00</updated>
<author>
<name>Daniel Henrique Barboza</name>
</author>
<published>2022-06-24T08:49:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=805150619e47eea910c760e1fde8d3e7e61a3a24'/>
<id>urn:sha1:805150619e47eea910c760e1fde8d3e7e61a3a24</id>
<content type='text'>
The unified pnv-phb-root-port can be used in its place. There is no ABI
breakage in doing so because no official QEMU release introduced user
creatable pnv-phb3-root-port devices.

Signed-off-by: Daniel Henrique Barboza &lt;danielhb413@gmail.com&gt;
Reviewed-by: Frederic Barrat &lt;fbarrat@linux.ibm.com&gt;
Message-Id: &lt;20220624084921.399219-8-danielhb413@gmail.com&gt;
</content>
</entry>
<entry>
<title>ppc/pnv: turn PnvPHB4 into a PnvPHB backend</title>
<updated>2022-08-31T17:08:05+00:00</updated>
<author>
<name>Daniel Henrique Barboza</name>
</author>
<published>2022-06-24T08:49:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=210aacb3b92707ecc5de811c743322ca395c0fa6'/>
<id>urn:sha1:210aacb3b92707ecc5de811c743322ca395c0fa6</id>
<content type='text'>
Change the parent type of the PnvPHB4 device to TYPE_PARENT since the
PCI bus is going to be initialized by the PnvPHB parent. Functions that
needs to access the bus via a PnvPHB4 object can do so via the
phb4-&gt;phb_base pointer.

pnv_phb4_pec now creates a PnvPHB object.

The powernv9 machine class will create PnvPHB devices with version '4'.
powernv10 will create using version '5'. Both are using global machine
properties in their class_init() to do that.

These changes will benefit us when adding PnvPHB user creatable devices
for powernv9 and powernv10.

Signed-off-by: Daniel Henrique Barboza &lt;danielhb413@gmail.com&gt;
Reviewed-by: Frederic Barrat &lt;fbarrat@linux.ibm.com&gt;
Message-Id: &lt;20220624084921.399219-6-danielhb413@gmail.com&gt;
</content>
</entry>
</feed>
