<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bwlp/qemu.git/linux-user/ppc, branch spice_video_codecs</title>
<subtitle>Experimental fork of QEMU with video encoding patches</subtitle>
<id>https://git.openslx.org/bwlp/qemu.git/atom/linux-user/ppc?h=spice_video_codecs</id>
<link rel='self' href='https://git.openslx.org/bwlp/qemu.git/atom/linux-user/ppc?h=spice_video_codecs'/>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/'/>
<updated>2022-09-27T07:30:09+00:00</updated>
<entry>
<title>linux-user: Provide MADV_* definitions</title>
<updated>2022-09-27T07:30:09+00:00</updated>
<author>
<name>Ilya Leoshkevich</name>
</author>
<published>2022-09-06T00:08:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=9f22020b91ae235be2b27c47d11e842872ec5e85'/>
<id>urn:sha1:9f22020b91ae235be2b27c47d11e842872ec5e85</id>
<content type='text'>
Provide MADV_* definitions using target_mman.h header, similar to what
kernel does. Most architectures use the same values, with the exception
of alpha and hppa.

Signed-off-by: Ilya Leoshkevich &lt;iii@linux.ibm.com&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Message-Id: &lt;20220906000839.1672934-2-iii@linux.ibm.com&gt;
Signed-off-by: Laurent Vivier &lt;laurent@vivier.eu&gt;
</content>
</entry>
<entry>
<title>Remove qemu-common.h include from most units</title>
<updated>2022-04-06T12:31:55+00:00</updated>
<author>
<name>Marc-André Lureau</name>
</author>
<published>2022-03-23T15:57:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=0f9668e0c197ab6de95f61a906703a1d127c11f8'/>
<id>urn:sha1:0f9668e0c197ab6de95f61a906703a1d127c11f8</id>
<content type='text'>
Signed-off-by: Marc-André Lureau &lt;marcandre.lureau@redhat.com&gt;
Message-Id: &lt;20220323155743.1585078-33-marcandre.lureau@redhat.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>Replace TARGET_WORDS_BIGENDIAN</title>
<updated>2022-04-06T08:50:37+00:00</updated>
<author>
<name>Marc-André Lureau</name>
</author>
<published>2022-03-23T15:57:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=ee3eb3a7ce7242735e6fd64cad53482e3df5a5ec'/>
<id>urn:sha1:ee3eb3a7ce7242735e6fd64cad53482e3df5a5ec</id>
<content type='text'>
Convert the TARGET_WORDS_BIGENDIAN macro, similarly to what was done
with HOST_BIG_ENDIAN. The new TARGET_BIG_ENDIAN macro is either 0 or 1,
and thus should always be defined to prevent misuse.

Signed-off-by: Marc-André Lureau &lt;marcandre.lureau@redhat.com&gt;
Suggested-by: Halil Pasic &lt;pasic@linux.ibm.com&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Message-Id: &lt;20220323155743.1585078-8-marcandre.lureau@redhat.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>Replace config-time define HOST_WORDS_BIGENDIAN</title>
<updated>2022-04-06T08:50:37+00:00</updated>
<author>
<name>Marc-André Lureau</name>
</author>
<published>2022-03-23T15:57:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=e03b56863d2bca3e649e81531c1b0299524481ae'/>
<id>urn:sha1:e03b56863d2bca3e649e81531c1b0299524481ae</id>
<content type='text'>
Replace a config-time define with a compile time condition
define (compatible with clang and gcc) that must be declared prior to
its usage. This avoids having a global configure time define, but also
prevents from bad usage, if the config header wasn't included before.

This can help to make some code independent from qemu too.

gcc supports __BYTE_ORDER__ from about 4.6 and clang from 3.2.

Signed-off-by: Marc-André Lureau &lt;marcandre.lureau@redhat.com&gt;
[ For the s390x parts I'm involved in ]
Acked-by: Halil Pasic &lt;pasic@linux.ibm.com&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Message-Id: &lt;20220323155743.1585078-7-marcandre.lureau@redhat.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>linux-user/ppc: Narrow type of ccr in save_user_regs</title>
<updated>2022-04-04T06:49:06+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2022-04-04T06:49:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=0798da8df9fd917515c957ae918d6d979cf5f3fb'/>
<id>urn:sha1:0798da8df9fd917515c957ae918d6d979cf5f3fb</id>
<content type='text'>
Coverity warns that we shift a 32-bit value by N, and then
accumulate it into a 64-bit type (target_ulong on ppc64).

The ccr is always 8 * 4-bit fields, and thus is always a
32-bit quantity; narrow the type to avoid the warning.

Fixes: Coverity CID 1487223
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Reviewed-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Message-Id: &lt;20220401191643.330393-1-richard.henderson@linaro.org&gt;
Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
</content>
</entry>
<entry>
<title>linux-user/ppc: deliver SIGTRAP on POWERPC_EXCP_TRAP</title>
<updated>2022-03-08T15:01:08+00:00</updated>
<author>
<name>Matheus Ferst</name>
</author>
<published>2022-01-13T17:04:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=083fe9a12d2025bb719ce8fb8cef86266f9bdddd'/>
<id>urn:sha1:083fe9a12d2025bb719ce8fb8cef86266f9bdddd</id>
<content type='text'>
Handle POWERPC_EXCP_TRAP in cpu_loop to deliver SIGTRAP on tw[i]/td[i].
The si_code comes from do_program_check in the kernel source file
arch/powerpc/kernel/traps.c

Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Signed-off-by: Matheus Ferst &lt;matheus.ferst@eldorado.org.br&gt;
Message-Id: &lt;20220113170456.1796911-2-matheus.ferst@eldorado.org.br&gt;
Signed-off-by: Laurent Vivier &lt;laurent@vivier.eu&gt;
</content>
</entry>
<entry>
<title>linux-user: Add missing "qemu/timer.h" include</title>
<updated>2022-02-21T09:18:06+00:00</updated>
<author>
<name>Philippe Mathieu-Daudé</name>
</author>
<published>2022-02-07T08:27:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=cdf06ce5629ac19d13064989012c88dd581bf6f6'/>
<id>urn:sha1:cdf06ce5629ac19d13064989012c88dd581bf6f6</id>
<content type='text'>
"qemu/timer.h" declares cpu_get_host_ticks().

Signed-off-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Reviewed-by: Thomas Huth &lt;thuth@redhat.com&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Message-Id: &lt;20220207082756.82600-9-f4bug@amsat.org&gt;
Signed-off-by: Thomas Huth &lt;thuth@redhat.com&gt;
</content>
</entry>
<entry>
<title>Merge remote-tracking branch 'remotes/legoater/tags/pull-ppc-20220210' into staging</title>
<updated>2022-02-13T20:33:28+00:00</updated>
<author>
<name>Peter Maydell</name>
</author>
<published>2022-02-13T20:33:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=cc5ce8b8b6be83e5fe3b668dbd061ad97c534e3f'/>
<id>urn:sha1:cc5ce8b8b6be83e5fe3b668dbd061ad97c534e3f</id>
<content type='text'>
ppc-7.0 queue

* Exception model rework (Fabiano)
* Unused CPU models removal (Fabiano and Cédric)
* Fix for VOF installation (Alexey)
* Misc fixes

# gpg: Signature made Thu 10 Feb 2022 12:59:07 GMT
# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater &lt;clg@kaod.org&gt;" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1

* remotes/legoater/tags/pull-ppc-20220210: (42 commits)
  spapr/vof: Install rom and nvram binaries
  docs: rstfy confidential guest documentation
  target/ppc: Change VSX instructions behavior to fill with zeros
  target/ppc: books: Remove excp_model argument from ppc_excp_apply_ail
  target/ppc: Assert if MSR bits differ from msr_mask during exceptions
  target/ppc: powerpc_excp: Move common code to the caller function
  target/ppc: Remove powerpc_excp_legacy
  target/ppc: 7xx: Set SRRs directly in exception code
  target/ppc: 7xx: Software TLB cleanup
  target/ppc: 7xx: System Reset cleanup
  target/ppc: 7xx: System Call exception cleanup
  target/ppc: 7xx: Program exception cleanup
  target/ppc: 7xx: External interrupt cleanup
  target/ppc: 7xx: Machine Check exception cleanup
  target/ppc: Simplify powerpc_excp_7xx
  target/ppc: Introduce powerpc_excp_7xx
  target/ppc: Merge 7x5 and 7x0 exception model IDs
  target/ppc: 6xx: Set SRRs directly in exception code
  target/ppc: 6xx: Software TLB exceptions cleanup
  target/ppc: 6xx: System Reset interrupt cleanup
  ...

Signed-off-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
</content>
</entry>
<entry>
<title>linux-user: Remove the deprecated ppc64abi32 target</title>
<updated>2022-02-09T13:29:38+00:00</updated>
<author>
<name>Thomas Huth</name>
</author>
<published>2022-01-12T11:27:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=74154d7e4a9a693313ad7639a92ff443c6258741'/>
<id>urn:sha1:74154d7e4a9a693313ad7639a92ff443c6258741</id>
<content type='text'>
It's likely broken, and nobody cared for picking it up again
during the deprecation phase, so let's remove this now.

Since this is the last entry in deprecated_targets_list, remove
the related code in the configure script, too.

Signed-off-by: Thomas Huth &lt;thuth@redhat.com&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Acked-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Acked-by: Alex Bennée &lt;alex.bennee@linaro.org&gt;
Message-Id: &lt;20211215084958.185214-1-thuth@redhat.com&gt;
Signed-off-by: Alex Bennée &lt;alex.bennee@linaro.org&gt;
Message-Id: &lt;20220112112722.3641051-32-alex.bennee@linaro.org&gt;
</content>
</entry>
<entry>
<title>target/ppc: Remove PowerPC 601 CPUs</title>
<updated>2022-02-09T08:08:55+00:00</updated>
<author>
<name>Cédric Le Goater</name>
</author>
<published>2022-02-09T08:08:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=005b69fdccd798dd8f0996d0f1c93ff5a4672180'/>
<id>urn:sha1:005b69fdccd798dd8f0996d0f1c93ff5a4672180</id>
<content type='text'>
The PowerPC 601 processor is the first generation of processors to
implement the PowerPC architecture. It was designed as a bridge
processor and also could execute most of the instructions of the
previous POWER architecture. It was found on the first Macs and IBM
RS/6000 workstations.

There is not much interest in keeping the CPU model of this
POWER-PowerPC bridge processor. We have the 603 and 604 CPU models of
the 60x family which implement the complete PowerPC instruction set.

Cc: "Hervé Poussineau" &lt;hpoussin@reactos.org&gt;
Cc: Laurent Vivier &lt;laurent@vivier.eu&gt;
Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Reviewed-by: Fabiano Rosas &lt;farosas@linux.ibm.com&gt;
Message-Id: &lt;20220203142756.1302515-1-clg@kaod.org&gt;
Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
</content>
</entry>
</feed>
