bwlp/qemu.git/target/arm/hvf, branch spice_video_codecs

Fix 'writeable' typos

2022-06-08T18:38:47+00:00

We have about 30 instances of the typo/variant spelling 'writeable', and over 500 of the more common 'writable'. Standardize on the latter. Change produced with: sed -i -e 's/$[Ww][Rr][Ii][Tt]$[Ee]$[Aa][Bb][Ll][Ee]$/\1\2/g' $(git grep -il writeable) and then hand-undoing the instance in linux-headers/linux/kvm.h. Most of these changes are in comments or documentation; the exceptions are: * a local variable in accel/hvf/hvf-accel-ops.c * a local variable in accel/kvm/kvm-all.c * the PMCR_WRITABLE_MASK macro in target/arm/internals.h * the EPT_VIOLATION_GPA_WRITABLE macro in target/i386/hvf/vmcs.h (which is never used anywhere) * the AR_TYPE_WRITABLE_MASK macro in target/i386/hvf/vmx.h (which is never used anywhere) Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Stefan Weil Message-id: 20220505095015.2714666-1-peter.maydell@linaro.org

target/arm/hvf: Include missing "cpregs.h"

2022-05-30T09:35:54+00:00

Fix when building HVF on macOS Aarch64: target/arm/hvf/hvf.c:586:15: error: unknown type name 'ARMCPRegInfo'; did you mean 'ARMCPUInfo'? const ARMCPRegInfo *ri; ^~~~~~~~~~~~ ARMCPUInfo target/arm/cpu-qom.h:38:3: note: 'ARMCPUInfo' declared here } ARMCPUInfo; ^ target/arm/hvf/hvf.c:589:14: error: implicit declaration of function 'get_arm_cp_reginfo' is invalid in C99 [-Werror,-Wimplicit-function-declaration] ri = get_arm_cp_reginfo(arm_cpu->cp_regs, key); ^ target/arm/hvf/hvf.c:589:12: warning: incompatible integer to pointer conversion assigning to 'const ARMCPUInfo *' (aka 'const struct ARMCPUInfo *') from 'int' [-Wint-conversion] ri = get_arm_cp_reginfo(arm_cpu->cp_regs, key); ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ target/arm/hvf/hvf.c:591:26: error: no member named 'type' in 'struct ARMCPUInfo' assert(!(ri->type & ARM_CP_NO_RAW)); ~~ ^ /Library/Developer/CommandLineTools/SDKs/MacOSX.sdk/usr/include/assert.h:99:25: note: expanded from macro 'assert' (__builtin_expect(!(e), 0) ? __assert_rtn(__func__, __ASSERT_FILE_NAME, __LINE__, #e) : (void)0) ^ target/arm/hvf/hvf.c:591:33: error: use of undeclared identifier 'ARM_CP_NO_RAW' assert(!(ri->type & ARM_CP_NO_RAW)); ^ 1 warning and 4 errors generated. Fixes: cf7c6d1004 ("target/arm: Split out cpregs.h") Reported-by: Duncan Bayne Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-id: 20220525161926.34233-1-philmd@fungible.com Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1029 Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Peter Maydell

target/arm: Avoid bare abort() or assert(0)

2022-05-05T08:35:51+00:00

Standardize on g_assert_not_reached() for "should not happen". Retain abort() when preceeded by fprintf or error_report. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-id: 20220501055028.646596-7-richard.henderson@linaro.org Signed-off-by: Peter Maydell

target/arm: Change CPUArchState.aarch64 to bool

2022-04-22T13:44:54+00:00

Bool is a more appropriate type for this value. Adjust the assignments to use true/false. Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée Signed-off-by: Peter Maydell

Remove qemu-common.h include from most units

2022-04-06T12:31:55+00:00

Signed-off-by: Marc-André Lureau Message-Id: <20220323155743.1585078-33-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini

target/arm: Support PSCI 1.1 and SMCCC 1.0

2022-03-02T19:27:36+00:00

Support the latest PSCI on TCG and HVF. A 64-bit function called from AArch32 now returns NOT_SUPPORTED, which is necessary to adhere to SMC Calling Convention 1.0. It is still not compliant with SMCCC 1.3 since they do not implement mandatory functions. Signed-off-by: Akihiko Odaki Message-id: 20220213035753.34577-1-akihiko.odaki@gmail.com Reviewed-by: Peter Maydell [PMM: update MISMATCH_CHECK checks on PSCI_VERSION macros to match] Signed-off-by: Peter Maydell

hvf: arm: Handle unknown ID registers as RES0

2022-02-21T13:30:19+00:00

Recent Linux versions added support to read ID_AA64ISAR2_EL1. On M1, those reads trap into QEMU which handles them as faults. However, AArch64 ID registers should always read as RES0. Let's handle them accordingly. This fixes booting Linux 5.17 guests. Cc: qemu-stable@nongnu.org Reported-by: Ivan Babrou Signed-off-by: Alexander Graf Message-id: 20220209124135.69183-2-agraf@csgraf.de Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell

hvf: arm: Use macros for sysreg shift/masking

2022-02-21T13:30:19+00:00

We are parsing the syndrome field for sysregs in multiple places across the hvf code, but repeat shift/mask operations with hard coded constants every time. This is an error prone approach and makes it harder to reason about the correctness of these operations. Let's introduce macros that allow us to unify the constants used as well as create new helpers to extract fields from the sysreg value. Suggested-by: Peter Maydell Signed-off-by: Alexander Graf Reviewed-by: Cameron Esfahani > Reviewed-by: Philippe Mathieu-Daudé Message-id: 20220209124135.69183-1-agraf@csgraf.de Signed-off-by: Peter Maydell

hvf: arm: Ignore cache operations on MMIO

2021-11-02T18:18:33+00:00

Apple's Hypervisor.Framework forwards cache operations as MMIO traps into user space. For MMIO however, these have no meaning: There is no cache attached to them. So let's just treat cache data exits as nops. This fixes OpenBSD booting as guest. Reported-by: AJ Barris Signed-off-by: Alexander Graf Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Mark Kettenis Reference: https://github.com/utmapp/UTM/issues/3197 Message-Id: <20211026071241.74889-1-agraf@csgraf.de> Signed-off-by: Richard Henderson

hvf: arm: Add rudimentary PMC support

2021-09-21T15:28:27+00:00

We can expose cycle counters on the PMU easily. To be as compatible as possible, let's do so, but make sure we don't expose any other architectural counters that we can not model yet. This allows OSs to work that require PMU support. Signed-off-by: Alexander Graf Reviewed-by: Peter Maydell Message-id: 20210916155404.86958-10-agraf@csgraf.de Signed-off-by: Peter Maydell