<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bwlp/qemu.git/target/hppa/int_helper.c, branch spice_video_codecs</title>
<subtitle>Experimental fork of QEMU with video encoding patches</subtitle>
<id>https://git.openslx.org/bwlp/qemu.git/atom/target/hppa/int_helper.c?h=spice_video_codecs</id>
<link rel='self' href='https://git.openslx.org/bwlp/qemu.git/atom/target/hppa/int_helper.c?h=spice_video_codecs'/>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/'/>
<updated>2022-02-02T17:46:42+00:00</updated>
<entry>
<title>hppa: Add support for an emulated TOC/NMI button.</title>
<updated>2022-02-02T17:46:42+00:00</updated>
<author>
<name>Helge Deller</name>
</author>
<published>2022-01-05T22:09:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=4a4554c6c561971197dffc80d641dc17ee2314dd'/>
<id>urn:sha1:4a4554c6c561971197dffc80d641dc17ee2314dd</id>
<content type='text'>
Almost all PA-RISC machines have either a button that is labeled with 'TOC' or
a BMC/GSP function to trigger a TOC.  TOC is a non-maskable interrupt that is
sent to the processor.  This can be used for diagnostic purposes like obtaining
a stack trace/register dump or to enter KDB/KGDB in Linux.

This patch adds support for such an emulated TOC button.

It wires up the qemu monitor "nmi" command to trigger a TOC.  For that it
provides the hppa_nmi function which is assigned to the nmi_monitor_handler
function pointer.  When called it raises the EXCP_TOC hardware interrupt in the
hppa_cpu_do_interrupt() function.  The interrupt function then calls the
architecturally defined TOC function in SeaBIOS-hppa firmware (at fixed address
0xf0000000).

According to the PA-RISC PDC specification, the SeaBIOS firmware then writes
the CPU registers into PIM (processor internal memmory) for later analysis.  In
order to write all registers it needs to know the contents of the CPU "shadow
registers" and the IASQ- and IAOQ-back values. The IAOQ/IASQ values are
provided by qemu in shadow registers when entering the SeaBIOS TOC function.
This patch adds a new aritificial opcode "getshadowregs" (0xfffdead2) which
restores the original values of the shadow registers. With this opcode SeaBIOS
can store those registers as well into PIM before calling an OS-provided TOC
handler.

To trigger a TOC, switch to the qemu monitor with Ctrl-A C, and type in the
command "nmi".  After the TOC started the OS-debugger, exit the qemu monitor
with Ctrl-A C.

Signed-off-by: Helge Deller &lt;deller@gmx.de&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>target/hppa: Restrict cpu_exec_interrupt() handler to sysemu</title>
<updated>2021-09-14T19:00:21+00:00</updated>
<author>
<name>Philippe Mathieu-Daudé</name>
</author>
<published>2021-09-11T16:54:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=68fa1780e07cb0a649d7cbd5c753cedcfe2e46c4'/>
<id>urn:sha1:68fa1780e07cb0a649d7cbd5c753cedcfe2e46c4</id>
<content type='text'>
Restrict cpu_exec_interrupt() and its callees to sysemu.

Signed-off-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Reviewed-by: Warner Losh &lt;imp@bsdimp.com&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Message-Id: &lt;20210911165434.531552-10-f4bug@amsat.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>overall/alpha tcg cpus|hppa: Fix Lesser GPL version number</title>
<updated>2020-11-15T15:43:54+00:00</updated>
<author>
<name>Chetan Pant</name>
</author>
<published>2020-10-23T12:33:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=d6ea423635958b0aaa1d58462d1603fd35194acf'/>
<id>urn:sha1:d6ea423635958b0aaa1d58462d1603fd35194acf</id>
<content type='text'>
There is no "version 2" of the "Lesser" General Public License.
It is either "GPL version 2.0" or "Lesser GPL version 2.1".
This patch replaces all occurrences of "Lesser GPL version 2" with
"Lesser GPL version 2.1" in comment section.

Signed-off-by: Chetan Pant &lt;chetan4windows@gmail.com&gt;
Message-Id: &lt;20201023123353.19796-1-chetan4windows@gmail.com&gt;
Reviewed-by: Thomas Huth &lt;thuth@redhat.com&gt;
Signed-off-by: Thomas Huth &lt;thuth@redhat.com&gt;
</content>
</entry>
<entry>
<title>hw/core: Move cpu.c, cpu.h from qom/ to hw/core/</title>
<updated>2019-08-21T11:24:01+00:00</updated>
<author>
<name>Markus Armbruster</name>
</author>
<published>2019-07-09T15:20:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=2e5b09fd0e766434962327db4678ce1cda0c7241'/>
<id>urn:sha1:2e5b09fd0e766434962327db4678ce1cda0c7241</id>
<content type='text'>
Suggested-by: Daniel P. Berrangé &lt;berrange@redhat.com&gt;
Signed-off-by: Markus Armbruster &lt;armbru@redhat.com&gt;
Message-Id: &lt;20190709152053.16670-2-armbru@redhat.com&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;philmd@redhat.com&gt;
Tested-by: Philippe Mathieu-Daudé &lt;philmd@redhat.com&gt;
[Rebased onto merge commit 95a9457fd44; missed instances of qom/cpu.h
in comments replaced]
</content>
</entry>
<entry>
<title>target/hppa: Use env_cpu, env_archcpu</title>
<updated>2019-06-10T14:03:34+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2019-03-23T00:51:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=25f327081b4f63290cce0607512e4627cbfd408e'/>
<id>urn:sha1:25f327081b4f63290cce0607512e4627cbfd408e</id>
<content type='text'>
Cleanup in the boilerplate that each target must define.
Replace hppa_env_get_cpu with env_archcpu.  The combination
CPU(hppa_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Reviewed-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>target: Do not include "exec/exec-all.h" if it is not necessary</title>
<updated>2018-06-01T12:15:10+00:00</updated>
<author>
<name>Philippe Mathieu-Daudé</name>
</author>
<published>2018-05-28T23:27:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=23c11b04dcc508536a7a39e723058523a94013a4'/>
<id>urn:sha1:23c11b04dcc508536a7a39e723058523a94013a4</id>
<content type='text'>
Code change produced with:
    $ git grep '#include "exec/exec-all.h"' | \
      cut -d: -f-1 | \
      xargs egrep -L "(cpu_address_space_init|cpu_loop_|tlb_|tb_|GETPC|singlestep|TranslationBlock)" | \
      xargs sed -i.bak '/#include "exec\/exec-all.h"/d'

Signed-off-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Message-Id: &lt;20180528232719.4721-10-f4bug@amsat.org&gt;
Acked-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>target/hppa: Include "qemu/log.h" to use qemu_log()</title>
<updated>2018-05-31T17:12:13+00:00</updated>
<author>
<name>Philippe Mathieu-Daudé</name>
</author>
<published>2018-05-28T23:27:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=0d114d0d5b9f3d10a1148b2412865e177ea5e4b9'/>
<id>urn:sha1:0d114d0d5b9f3d10a1148b2412865e177ea5e4b9</id>
<content type='text'>
Since his inception in 61766fe9e2d, this file uses the qemu_log()
API from "qemu/log.h".  Include it to allow further includes
cleanup.

Signed-off-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Message-Id: &lt;20180528232719.4721-9-f4bug@amsat.org&gt;
Acked-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>target/hppa: Implement the interval timer</title>
<updated>2018-01-30T18:22:26+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2017-12-29T01:50:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=49c29d6c2e8ce2d3cddf9a92452d1ccb78051517'/>
<id>urn:sha1:49c29d6c2e8ce2d3cddf9a92452d1ccb78051517</id>
<content type='text'>
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>target/hppa: Implement external interrupts</title>
<updated>2018-01-30T18:22:26+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2017-12-29T01:36:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=4f5f254808e1e317b407275724df7794a270c5c1'/>
<id>urn:sha1:4f5f254808e1e317b407275724df7794a270c5c1</id>
<content type='text'>
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>target/hppa: Implement tlb_fill</title>
<updated>2018-01-30T18:22:15+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2017-10-27T08:17:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=650cdb2a2e4936fb66c13793278f4bacf0e5a6f7'/>
<id>urn:sha1:650cdb2a2e4936fb66c13793278f4bacf0e5a6f7</id>
<content type='text'>
However since HPPA has a software-managed TLB, and the relevant
TLB manipulation instructions are not implemented, this does not
actually do anything.

Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
</feed>
