<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bwlp/qemu.git/target/i386/seg_helper.c, branch spice_video_codecs</title>
<subtitle>Experimental fork of QEMU with video encoding patches</subtitle>
<id>https://git.openslx.org/bwlp/qemu.git/atom/target/i386/seg_helper.c?h=spice_video_codecs</id>
<link rel='self' href='https://git.openslx.org/bwlp/qemu.git/atom/target/i386/seg_helper.c?h=spice_video_codecs'/>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/'/>
<updated>2020-12-16T19:06:53+00:00</updated>
<entry>
<title>i386: move TCG accel files into tcg/</title>
<updated>2020-12-16T19:06:53+00:00</updated>
<author>
<name>Claudio Fontana</name>
</author>
<published>2020-12-12T15:55:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=1b248f147ea692c1a3d0ff18245a1b02df8b1502'/>
<id>urn:sha1:1b248f147ea692c1a3d0ff18245a1b02df8b1502</id>
<content type='text'>
Signed-off-by: Claudio Fontana &lt;cfontana@suse.de&gt;
Reviewed-by: Alex Bennée &lt;alex.bennee@linaro.org&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;

[claudio: moved cc_helper_template.h to tcg/ too]

Signed-off-by: Claudio Fontana &lt;cfontana@suse.de&gt;
Message-Id: &lt;20201212155530.23098-6-cfontana@suse.de&gt;
Signed-off-by: Eduardo Habkost &lt;ehabkost@redhat.com&gt;
</content>
</entry>
<entry>
<title>target/i386: seg_helper: Correct segment selector nullification in the RET/IRET helper</title>
<updated>2020-12-10T17:15:00+00:00</updated>
<author>
<name>Bin Meng</name>
</author>
<published>2020-11-13T09:56:18+00:00</published>
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<id>urn:sha1:c2ba0515f2df58a661fcb5d6485139877d92ab1b</id>
<content type='text'>
Per the SDM, when returning to outer privilege level, for segment
registers (ES, FS, GS, and DS) if the check fails, the segment
selector becomes null, but QEMU clears the base/limit/flags as well
as nullifying the segment selector, which should be a spec violation.

Real hardware seems to be compliant with the spec, at least on one
Coffee Lake board I tested.

Signed-off-by: Bin Meng &lt;bin.meng@windriver.com&gt;

Message-Id: &lt;1605261378-77971-1-git-send-email-bmeng.cn@gmail.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>x86 tcg cpus: Fix Lesser GPL version number</title>
<updated>2020-11-15T15:41:42+00:00</updated>
<author>
<name>Chetan Pant</name>
</author>
<published>2020-10-23T12:28:01+00:00</published>
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<id>urn:sha1:d9ff33ada7f32ca59f99b270a2d0eb223b3c9c8f</id>
<content type='text'>
There is no "version 2" of the "Lesser" General Public License.
It is either "GPL version 2.0" or "Lesser GPL version 2.1".
This patch replaces all occurrences of "Lesser GPL version 2" with
"Lesser GPL version 2.1" in comment section.

Signed-off-by: Chetan Pant &lt;chetan4windows@gmail.com&gt;
Message-Id: &lt;20201023122801.19514-1-chetan4windows@gmail.com&gt;
Reviewed-by: Thomas Huth &lt;thuth@redhat.com&gt;
Signed-off-by: Thomas Huth &lt;thuth@redhat.com&gt;
</content>
</entry>
<entry>
<title>helper_syscall x86_64: clear exception_is_int</title>
<updated>2020-09-30T17:11:36+00:00</updated>
<author>
<name>Douglas Crosher</name>
</author>
<published>2020-09-22T04:17:56+00:00</published>
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<id>urn:sha1:56bf1c4985fb9ad24642f176cc40db0eb4f3dc31</id>
<content type='text'>
The exception_is_int flag may be set on entry to helper_syscall,
e.g. after a prior interrupt that has returned, and processing
EXCP_SYSCALL as an interrupt causes it to fail so clear this flag.

Signed-off-by: Douglas Crosher &lt;dtc-ubuntu@scieneer.com&gt;
Message-Id: &lt;a7dab33e-eda6-f988-52e9-f3d32db7538d@scieneer.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>target/i386: Use cpu_*_mmuidx_ra instead of templates</title>
<updated>2020-01-16T01:13:10+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2019-12-10T16:59:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=21ffbdc908c347d2e3c7d49abb664dcd554a63ac'/>
<id>urn:sha1:21ffbdc908c347d2e3c7d49abb664dcd554a63ac</id>
<content type='text'>
Do not use exec/cpu_ldst_{,useronly_}template.h directly,
but instead use the functional interface.

Cc: Eduardo Habkost &lt;ehabkost@redhat.com&gt;
Tested-by: Philippe Mathieu-Daudé &lt;philmd@redhat.com&gt;
Acked-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
Reviewed-by: Alex Bennée &lt;alex.bennee@linaro.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>target/i386: Use env_cpu, env_archcpu</title>
<updated>2019-06-10T14:03:42+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2019-03-23T01:08:48+00:00</published>
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<id>urn:sha1:6aa9e42f27331be34e06d4d66f92f2272868f96a</id>
<content type='text'>
Cleanup in the boilerplate that each target must define.
Replace x86_env_get_cpu with env_archcpu.  The combination
CPU(x86_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Reviewed-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>target/i386: Clear RF on SYSCALL instruction</title>
<updated>2018-11-06T20:35:05+00:00</updated>
<author>
<name>Rudolf Marek</name>
</author>
<published>2018-10-19T12:24:49+00:00</published>
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<id>urn:sha1:1a1435dd61e28c1e3b70971107d72a7d05b28d03</id>
<content type='text'>
Fix the SYSCALL instruction in 64-bit (long mode). The RF flag
should be cleared in R11 as well as in the RFLAGS. Intel
and AMD CPUs behave same. AMD has this documented in the
APM vol 3.

Signed-off-by: Roman Kapl &lt;rka@sysgo.com&gt;
Signed-off-by: Rudolf Marek &lt;rudolf.marek@sysgo.com&gt;
Message-Id: &lt;20181019122449.26387-1-rka@sysgo.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>target/i386: rename HF_SVMI_MASK to HF_GUEST_MASK</title>
<updated>2018-10-02T17:09:12+00:00</updated>
<author>
<name>Paolo Bonzini</name>
</author>
<published>2018-08-21T07:40:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=f8dc4c645ec2956a6cd97e0ca0fdd4753181f735'/>
<id>urn:sha1:f8dc4c645ec2956a6cd97e0ca0fdd4753181f735</id>
<content type='text'>
This flag will be used for KVM's nested VMX migration; the HF_GUEST_MASK name
is already used in KVM, adopt it in QEMU as well.

Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>target/i386: unify masking of interrupts</title>
<updated>2018-10-02T17:09:12+00:00</updated>
<author>
<name>Paolo Bonzini</name>
</author>
<published>2018-08-21T13:31:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=92d5f1a4147c3722b5e9a8bcfb7dc261b7a8b855'/>
<id>urn:sha1:92d5f1a4147c3722b5e9a8bcfb7dc261b7a8b855</id>
<content type='text'>
Interrupt handling depends on various flags in env-&gt;hflags or env-&gt;hflags2,
and the exact detail were not exactly replicated between x86_cpu_has_work
and x86_cpu_exec_interrupt.  Create a new function that extracts the
highest-priority non-masked interrupt, and use it in both functions.

Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>target-i386: fix segment limit check in ljmp</title>
<updated>2018-08-23T16:46:25+00:00</updated>
<author>
<name>Andrew Oates</name>
</author>
<published>2018-08-16T01:19:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=db7196db5d5d932f388643baae6835f8dcda6921'/>
<id>urn:sha1:db7196db5d5d932f388643baae6835f8dcda6921</id>
<content type='text'>
The current implementation has three bugs,
 * segment limits are not enforced in protected mode if the L bit is set
   in the target segment descriptor
 * segment limits are not enforced in compatibility mode (ljmp to 32-bit
   code segment in long mode)
 * #GP(new_cs) is generated rather than #GP(0)

Now the segment limits are enforced if we're not in long mode OR the
target code segment doesn't have the L bit set.

Signed-off-by: Andrew Oates &lt;aoates@google.com&gt;
Message-Id: &lt;20180816011903.39816-1-andrew@andrewoates.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
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