Experimental fork of QEMU with video encoding patches https://git.openslx.org/bwlp/qemu.git/atom/target/loongarch?h=master 2022-11-07T02:54:11+00:00 2022-11-07T02:54:11+00:00 Rui Wang 2022-11-07T02:45:26+00:00 urn:sha1:e913bace61c539a88feb489b424554ebb2d5d3a3 Regarding the patchset v3 has been merged into main line, and not approved, this patch updates to patchset v4. Fixes: 2419978c ("target/loongarch: Fix emulation of float-point disable exception") Link: https://lists.nongnu.org/archive/html/qemu-devel/2022-11/msg00808.html Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Rui Wang <wangrui@loongson.cn> Message-Id: <20221107024526.702297-3-wangrui@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn> 2022-11-07T02:54:08+00:00 Rui Wang 2022-11-07T02:45:25+00:00 urn:sha1:c8885b8839dfe39ee7b02dedcbf79af9087c9079 Regarding the patchset v3 has been merged into main line, and not approved, this patch updates to patchset v4. Fixes: b4bda200 ("target/loongarch: Adjust the layout of hardware flags bit fields") Link: https://lists.nongnu.org/archive/html/qemu-devel/2022-11/msg00808.html Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Rui Wang <wangrui@loongson.cn> Message-Id: <20221107024526.702297-2-wangrui@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn> 2022-11-04T09:10:53+00:00 Rui Wang 2022-11-04T04:05:17+00:00 urn:sha1:2419978cb09e11bc53a07d4de5621424d2a6a86d We need to emulate it to generate a floating point disable exception when CSR.EUEN.FPE is zero. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Rui Wang <wangrui@loongson.cn> Message-Id: <20221104040517.222059-3-wangrui@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn> 2022-11-04T09:10:52+00:00 Rui Wang 2022-11-04T04:05:16+00:00 urn:sha1:b4bda2006f482f778d9dbf86038ff115fe89db92 Suggested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Rui Wang <wangrui@loongson.cn> Message-Id: <20221104040517.222059-2-wangrui@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn> 2022-11-04T09:09:50+00:00 Song Gao 2022-11-01T06:53:31+00:00 urn:sha1:8752b1306002237c39b3f849ca564c9db55c8b1f When the address is invalid address, We should set exception_index according to MMUAccessType, and EXCCODE_ADEF need't update badinstr. Otherwise, The system enters an infinite loop. e.g: run test.c on system mode test.c: #include<stdio.h> void (*func)(int *); int main() { int i = 8; void *ptr = (void *)0x4000000000000000; func = ptr; func(&i); return 0; } Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20221101073210.3934280-2-gaosong@loongson.cn> 2022-11-04T09:09:50+00:00 Song Gao 2022-11-01T03:17:15+00:00 urn:sha1:a6b129c8102668717370ec27490523fb1290ae5d We need subcodes to distinguish the same excode cs->exception_indexs, such as EXCCODE_ADEF/EXCCODE_ADEM. Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20221101073210.3934280-1-gaosong@loongson.cn> 2022-11-04T09:07:40+00:00 Xiaojuan Yang 2022-10-21T01:53:07+00:00 urn:sha1:a649fffcc9589a88464474e9105798eb62023352 1. When cpu read or write extioi COREISR reg, it should access the reg belonged to itself, so the cpu index of 's->coreisr' is current cpu number. Using MemTxAttrs' requester_id to get the cpu index. 2. it need not to mask 0x1f when calculate the coreisr array index. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20221021015307.2570844-3-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn> 2022-10-26T01:11:28+00:00 Richard Henderson 2022-10-24T10:24:10+00:00 urn:sha1:ab27940f8e6a0e092c72b0602c5a8cc379f26d99 Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> 2022-10-17T02:28:35+00:00 Song Gao 2022-09-30T02:45:09+00:00 urn:sha1:153620126add5c4868308cc5831d400c7e7029ad Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220930024510.800005-3-gaosong@loongson.cn> 2022-10-17T02:28:35+00:00 Song Gao 2022-09-30T02:45:08+00:00 urn:sha1:68e35a2b75eaf1a55a83bb0b102aeb017ab44e06 use gen_bstrins/gen_bstrpic to replace gen_rr_ms_ls. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220930024510.800005-2-gaosong@loongson.cn>