<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bwlp/qemu.git/target/microblaze/cpu.h, branch spice_video_codecs</title>
<subtitle>Experimental fork of QEMU with video encoding patches</subtitle>
<id>https://git.openslx.org/bwlp/qemu.git/atom/target/microblaze/cpu.h?h=spice_video_codecs</id>
<link rel='self' href='https://git.openslx.org/bwlp/qemu.git/atom/target/microblaze/cpu.h?h=spice_video_codecs'/>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/'/>
<updated>2022-04-21T13:03:51+00:00</updated>
<entry>
<title>compiler.h: replace QEMU_NORETURN with G_NORETURN</title>
<updated>2022-04-21T13:03:51+00:00</updated>
<author>
<name>Marc-André Lureau</name>
</author>
<published>2022-04-20T13:26:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=8905770b27be326d12a704629f3cb715642db6cc'/>
<id>urn:sha1:8905770b27be326d12a704629f3cb715642db6cc</id>
<content type='text'>
G_NORETURN was introduced in glib 2.68, fallback to G_GNUC_NORETURN in
glib-compat.

Note that this attribute must be placed before the function declaration
(bringing a bit of consistency in qemu codebase usage).

Signed-off-by: Marc-André Lureau &lt;marcandre.lureau@redhat.com&gt;
Reviewed-by: Daniel P. Berrangé &lt;berrange@redhat.com&gt;
Reviewed-by: Warner Losh &lt;imp@bsdimp.com&gt;
Message-Id: &lt;20220420132624.2439741-20-marcandre.lureau@redhat.com&gt;
</content>
</entry>
<entry>
<title>Move CPU softfloat unions to cpu-float.h</title>
<updated>2022-04-06T12:31:43+00:00</updated>
<author>
<name>Marc-André Lureau</name>
</author>
<published>2022-03-23T15:57:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=69242e7e7ea55f2a3f4fa50e367cad849c9cdc36'/>
<id>urn:sha1:69242e7e7ea55f2a3f4fa50e367cad849c9cdc36</id>
<content type='text'>
The types are no longer used in bswap.h since commit
f930224fffe ("bswap.h: Remove unused float-access functions"), there
isn't much sense in keeping it there and having a dependency on fpu/.

Signed-off-by: Marc-André Lureau &lt;marcandre.lureau@redhat.com&gt;
Message-Id: &lt;20220323155743.1585078-29-marcandre.lureau@redhat.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>target: Use ArchCPU as interface to target CPU</title>
<updated>2022-03-06T21:23:09+00:00</updated>
<author>
<name>Philippe Mathieu-Daudé</name>
</author>
<published>2022-02-14T16:15:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=b36e239e08a031025e52c4191198ee8381e2e6de'/>
<id>urn:sha1:b36e239e08a031025e52c4191198ee8381e2e6de</id>
<content type='text'>
ArchCPU is our interface with target-specific code. Use it as
a forward-declared opaque pointer (abstract type), having its
structure defined by each target.

Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Message-Id: &lt;20220214183144.27402-15-f4bug@amsat.org&gt;
</content>
</entry>
<entry>
<title>target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro</title>
<updated>2022-03-06T21:23:09+00:00</updated>
<author>
<name>Philippe Mathieu-Daudé</name>
</author>
<published>2022-02-14T16:08:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=9295b1aa92d3efb3c08b71ee751fbfd83ea02f4d'/>
<id>urn:sha1:9295b1aa92d3efb3c08b71ee751fbfd83ea02f4d</id>
<content type='text'>
Replace the boilerplate code to declare CPU QOM types
and macros, and forward-declare the CPU instance type.

Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Message-Id: &lt;20220214183144.27402-14-f4bug@amsat.org&gt;
</content>
</entry>
<entry>
<title>target: Use CPUArchState as interface to target-specific CPU state</title>
<updated>2022-03-06T21:23:09+00:00</updated>
<author>
<name>Philippe Mathieu-Daudé</name>
</author>
<published>2022-02-07T12:35:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=1ea4a06af0f6578e5d0ddcea148503290b1c4907'/>
<id>urn:sha1:1ea4a06af0f6578e5d0ddcea148503290b1c4907</id>
<content type='text'>
While CPUState is our interface with generic code, CPUArchState is
our interface with target-specific code. Use CPUArchState as an
abstract type, defined by each target.

Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Message-Id: &lt;20220214183144.27402-13-f4bug@amsat.org&gt;
</content>
</entry>
<entry>
<title>target/microblaze: Make mb_cpu_tlb_fill sysemu only</title>
<updated>2021-11-02T11:00:52+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2021-09-15T00:17:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=fd297732a2c27aae8407a0c96660345af10575df'/>
<id>urn:sha1:fd297732a2c27aae8407a0c96660345af10575df</id>
<content type='text'>
The fallback code in cpu_loop_exit_sigsegv is sufficient
for microblaze linux-user.

Remove the code from cpu_loop that handled the unnamed 0xaa exception.

Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Reviewed-by: Edgar E. Iglesias &lt;edgar.iglesias@xilinx.com&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>hw/core: Make do_unaligned_access noreturn</title>
<updated>2021-09-22T02:36:44+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2021-07-29T20:45:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=fa947a667fceab02f9f85fc99f54aebcc9ae6b51'/>
<id>urn:sha1:fa947a667fceab02f9f85fc99f54aebcc9ae6b51</id>
<content type='text'>
While we may have had some thought of allowing system-mode
to return from this hook, we have no guests that require this.

Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Reviewed-by: Alex Bennée &lt;alex.bennee@linaro.org&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>include/exec: Move cpu_signal_handler declaration</title>
<updated>2021-09-22T02:36:44+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2021-08-03T15:31:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=8b1d5b3c3507d062d7611a64a81989e8903605ed'/>
<id>urn:sha1:8b1d5b3c3507d062d7611a64a81989e8903605ed</id>
<content type='text'>
There is nothing target specific about this.  The implementation
is host specific, but the declaration is 100% common.

Reviewed-By: Warner Losh &lt;imp@bsdimp.com&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>target/microblaze: Restrict cpu_exec_interrupt() handler to sysemu</title>
<updated>2021-09-14T19:00:21+00:00</updated>
<author>
<name>Philippe Mathieu-Daudé</name>
</author>
<published>2021-09-11T16:54:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=eb3ef3136eb2a56026d7f1516082e14a0c98f152'/>
<id>urn:sha1:eb3ef3136eb2a56026d7f1516082e14a0c98f152</id>
<content type='text'>
Restrict cpu_exec_interrupt() and its callees to sysemu.

Signed-off-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Reviewed-by: Warner Losh &lt;imp@bsdimp.com&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Message-Id: &lt;20210911165434.531552-14-f4bug@amsat.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>target/microblaze: Add security attributes on memory transactions</title>
<updated>2021-01-27T07:32:55+00:00</updated>
<author>
<name>Joe Komlodi</name>
</author>
<published>2021-01-22T00:18:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=43a9ede1efd12d297278d017ce7df7130672e15d'/>
<id>urn:sha1:43a9ede1efd12d297278d017ce7df7130672e15d</id>
<content type='text'>
Using the cfg.use_non_secure bitfield and the MMU access type, we can determine
if the access should be secure or not.

Signed-off-by: Joe Komlodi &lt;komlodi@xilinx.com&gt;
Reviewed-by: Edgar E. Iglesias &lt;edgar.iglesias@xilinx.com&gt;
Tested-by: Edgar E. Iglesias &lt;edgar.iglesias@xilinx.com&gt;
Message-Id: &lt;1611274735-303873-4-git-send-email-komlodi@xilinx.com&gt;
Signed-off-by: Edgar E. Iglesias &lt;edgar.iglesias@xilinx.com&gt;
</content>
</entry>
</feed>
