<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bwlp/qemu.git/target/ppc/user_only_helper.c, branch spice_video_codecs</title>
<subtitle>Experimental fork of QEMU with video encoding patches</subtitle>
<id>https://git.openslx.org/bwlp/qemu.git/atom/target/ppc/user_only_helper.c?h=spice_video_codecs</id>
<link rel='self' href='https://git.openslx.org/bwlp/qemu.git/atom/target/ppc/user_only_helper.c?h=spice_video_codecs'/>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/'/>
<updated>2021-11-02T11:00:52+00:00</updated>
<entry>
<title>target/ppc: Implement ppc_cpu_record_sigsegv</title>
<updated>2021-11-02T11:00:52+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2021-09-18T13:37:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=1db8af5c87ef5c89ecdb9e2d2620cd38cfbca940'/>
<id>urn:sha1:1db8af5c87ef5c89ecdb9e2d2620cd38cfbca940</id>
<content type='text'>
Record DAR, DSISR, and exception_index.  That last means
that we must exit to cpu_loop ourselves, instead of letting
exception_index being overwritten.

This is exactly what the user-mode ppc_cpu_tlb_fill does,
so simply rename it as ppc_cpu_record_sigsegv.

Reviewed-by: Warner Losh &lt;imp@bsdimp.com&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>powerpc tcg: Fix Lesser GPL version number</title>
<updated>2020-11-15T15:38:50+00:00</updated>
<author>
<name>Chetan Pant</name>
</author>
<published>2020-10-19T06:11:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=6bd039cdbee2378ae1dff1d8b735466e9473f7f6'/>
<id>urn:sha1:6bd039cdbee2378ae1dff1d8b735466e9473f7f6</id>
<content type='text'>
There is no "version 2" of the "Lesser" General Public License.
It is either "GPL version 2.0" or "Lesser GPL version 2.1".
This patch replaces all occurrences of "Lesser GPL version 2" with
"Lesser GPL version 2.1" in comment section.

Signed-off-by: Chetan Pant &lt;chetan4windows@gmail.com&gt;
Message-Id: &lt;20201019061126.3102-1-chetan4windows@gmail.com&gt;
Reviewed-by: Thomas Huth &lt;thuth@redhat.com&gt;
Signed-off-by: Thomas Huth &lt;thuth@redhat.com&gt;
</content>
</entry>
<entry>
<title>target/ppc: Convert to CPUClass::tlb_fill</title>
<updated>2019-05-10T18:12:50+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2019-04-02T10:03:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=351bc97ecfa4b7ef1f1fc9cc32de3541b2130000'/>
<id>urn:sha1:351bc97ecfa4b7ef1f1fc9cc32de3541b2130000</id>
<content type='text'>
Cc: qemu-ppc@nongnu.org
Acked-by: David Gibson &lt;david@gibson.dropbear.id.au&gt;
Reviewed-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>accel/tcg: add size paremeter in tlb_fill()</title>
<updated>2018-01-25T15:02:24+00:00</updated>
<author>
<name>Laurent Vivier</name>
</author>
<published>2018-01-18T19:38:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=98670d47cd8d63a529ff230fd39ddaa186156f8c'/>
<id>urn:sha1:98670d47cd8d63a529ff230fd39ddaa186156f8c</id>
<content type='text'>
The MC68040 MMU provides the size of the access that
triggers the page fault.

This size is set in the Special Status Word which
is written in the stack frame of the access fault
exception.

So we need the size in m68k_cpu_unassigned_access() and
m68k_cpu_handle_mmu_fault().

To be able to do that, this patch modifies the prototype of
handle_mmu_fault handler, tlb_fill() and probe_write().
do_unassigned_access() already includes a size parameter.

This patch also updates handle_mmu_fault handlers and
tlb_fill() of all targets (only parameter, no code change).

Signed-off-by: Laurent Vivier &lt;laurent@vivier.eu&gt;
Reviewed-by: David Hildenbrand &lt;david@redhat.com&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Message-Id: &lt;20180118193846.24953-2-laurent@vivier.eu&gt;
</content>
</entry>
<entry>
<title>Move target-* CPU file into a target/ folder</title>
<updated>2016-12-20T20:52:12+00:00</updated>
<author>
<name>Thomas Huth</name>
</author>
<published>2016-10-11T06:56:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=fcf5ef2ab52c621a4617ebbef36bf43b4003f4c0'/>
<id>urn:sha1:fcf5ef2ab52c621a4617ebbef36bf43b4003f4c0</id>
<content type='text'>
We've currently got 18 architectures in QEMU, and thus 18 target-xxx
folders in the root folder of the QEMU source tree. More architectures
(e.g. RISC-V, AVR) are likely to be included soon, too, so the main
folder of the QEMU sources slowly gets quite overcrowded with the
target-xxx folders.
To disburden the main folder a little bit, let's move the target-xxx
folders into a dedicated target/ folder, so that target-xxx/ simply
becomes target/xxx/ instead.

Acked-by: Laurent Vivier &lt;laurent@vivier.eu&gt; [m68k part]
Acked-by: Bastian Koppelmann &lt;kbastian@mail.uni-paderborn.de&gt; [tricore part]
Acked-by: Michael Walle &lt;michael@walle.cc&gt; [lm32 part]
Acked-by: Cornelia Huck &lt;cornelia.huck@de.ibm.com&gt; [s390x part]
Reviewed-by: Christian Borntraeger &lt;borntraeger@de.ibm.com&gt; [s390x part]
Acked-by: Eduardo Habkost &lt;ehabkost@redhat.com&gt; [i386 part]
Acked-by: Artyom Tarasenko &lt;atar4qemu@gmail.com&gt; [sparc part]
Acked-by: Richard Henderson &lt;rth@twiddle.net&gt; [alpha part]
Acked-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt; [xtensa part]
Reviewed-by: David Gibson &lt;david@gibson.dropbear.id.au&gt; [ppc part]
Acked-by: Edgar E. Iglesias &lt;edgar.iglesias@xilinx.com&gt; [cris&amp;microblaze part]
Acked-by: Guan Xuetao &lt;gxt@mprc.pku.edu.cn&gt; [unicore32 part]
Signed-off-by: Thomas Huth &lt;thuth@redhat.com&gt;
</content>
</entry>
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