bwlp/qemu.git/target/ppc, branch spice_video_codecs

target/ppc: Fix build warnings when building with 'disable-tcg'

2022-11-17T14:28:04+00:00

Kowshik reported that building qemu with GCC 12.2.1 for 'ppc64-softmmu' target is failing due to following build warnings: ../target/ppc/cpu_init.c:7018:13: error: 'ppc_restore_state_to_opc' defined but not used [-Werror=unused-function] 7018 | static void ppc_restore_state_to_opc(CPUState *cs, Fix this by wrapping these function definitions in 'ifdef CONFIG_TCG' so that they are only defined if qemu is compiled with '--enable-tcg' Reported-by: Kowshik Jois B S Fixes: 61bd1d2942 ("target/ppc: Convert to tcg_ops restore_state_to_opc") Fixes: 670f1da374 ("target/ppc: Implement hashst and hashchk") Fixes: 53ae2aeb94 ("target/ppc: Implement hashstp and hashchkp") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1319 Signed-off-by: Vaibhav Jain Reviewed-by: Greg Kurz Reviewed-by: Philippe Mathieu-Daudé Tested-by: Kowshik Jois B S Message-Id: <20221116131743.658708-1-vaibhav@linux.ibm.com> Signed-off-by: Daniel Henrique Barboza

accel/tcg: Remove will_exit argument from cpu_restore_state

2022-10-31T21:31:41+00:00

The value passed is always true, and if the target's synchronize_from_tb hook is non-trivial, not exiting may be erroneous. Reviewed-by: Claudio Fontana Signed-off-by: Richard Henderson

target/ppc: Fix regression in Radix MMU

2022-10-29T09:34:52+00:00

Commit 47e83d9107 ended up unintentionally changing the control flow of ppc_radix64_process_scoped_xlate(). When guest_visible is false, it must not raise an exception, even if the radix configuration is not valid. This regression prevented Linux boot in a nested environment with L1 using TCG and emulating KVM (cap-nested-hv=on) and L2 using KVM. L2 would hang on Linux's futex_init(), when it tested how a futex_atomic_cmpxchg_inatomic() handled a fault, because L1 would start a loop of trying to perform partition scoped translations and raising exceptions. Fixes: 47e83d9107 ("target/ppc: Improve Radix xlate level validation") Reported-by: Victor Colombo Signed-off-by: Leandro Lupori Tested-by: Víctor Colombo Reviewed-by: Daniel Henrique Barboza Message-Id: <20221028183617.121786-1-leandro.lupori@eldorado.org.br> [danielhb: use %"PRIu64" to print 'nls'] Signed-off-by: Daniel Henrique Barboza

target/ppc: Increment PMC5 with inline insns

2022-10-28T16:15:23+00:00

Profiling QEMU during Fedora 35 for PPC64 boot revealed that 6.39% of total time was being spent in helper_insns_inc(), on a POWER9 machine. To avoid calling this helper every time PMCs had to be incremented, an inline implementation of PMC5 increment and check for overflow was developed. This led to a reduction of about 12% in Fedora's boot time. Signed-off-by: Leandro Lupori Reviewed-by: Daniel Henrique Barboza Message-Id: <20221025202424.195984-4-leandro.lupori@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza

target/ppc: Add new PMC HFLAGS

2022-10-28T16:15:23+00:00

Add 2 new PMC related HFLAGS: - HFLAGS_PMCJCE - value of MMCR0 PMCjCE bit - HFLAGS_PMC_OTHER - set if a PMC other than PMC5-6 is enabled These flags allow further optimization of PMC5 update code, by allowing frequently tested conditions to be performed at translation time. Signed-off-by: Leandro Lupori Reviewed-by: Daniel Henrique Barboza Message-Id: <20221025202424.195984-3-leandro.lupori@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza

target/ppc: move the p*_interrupt_powersave methods to excp_helper.c

2022-10-28T16:15:22+00:00

Move the methods to excp_helper.c and make them static. Reviewed-by: Fabiano Rosas Signed-off-by: Matheus Ferst Message-Id: <20221021142156.4134411-4-matheus.ferst@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza

target/ppc: unify cpu->has_work based on cs->interrupt_request

2022-10-28T16:15:22+00:00

Now that cs->interrupt_request indicates if there is any unmasked interrupt, checking if the CPU has work to do can be simplified to a single check that works for all CPU models. Reviewed-by: Fabiano Rosas Signed-off-by: Matheus Ferst Message-Id: <20221021142156.4134411-3-matheus.ferst@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza

target/ppc: introduce ppc_maybe_interrupt

2022-10-28T16:15:22+00:00

This new method will check if any pending interrupt was unmasked and then call cpu_interrupt/cpu_reset_interrupt accordingly. Code that raises/lowers or masks/unmasks interrupts should call this method to keep CPU_INTERRUPT_HARD coherent with env->pending_interrupts. Signed-off-by: Matheus Ferst Reviewed-by: Daniel Henrique Barboza Message-Id: <20221021142156.4134411-2-matheus.ferst@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza

target/ppc: remove ppc_store_lpcr from CONFIG_USER_ONLY builds

2022-10-28T16:15:22+00:00

Writes to LPCR are hypervisor privileged. Signed-off-by: Matheus Ferst Reviewed-by: Fabiano Rosas Message-Id: <20221011204829.1641124-27-matheus.ferst@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza

target/ppc: add power-saving interrupt masking logic to p7_next_unmasked_interrupt

2022-10-28T16:15:22+00:00

Export p7_interrupt_powersave and use it in p7_next_unmasked_interrupt. Signed-off-by: Matheus Ferst Reviewed-by: Fabiano Rosas Message-Id: <20221011204829.1641124-26-matheus.ferst@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza