bwlp/qemu.git/target/s390x/Makefile.objs, branch spice_video_codecs

meson: target

2020-08-21T10:30:35+00:00

Similar to hw_arch, each architecture defines two sourceset which are placed in dictionaries target_arch and target_softmmu_arch. These are then picked up from there when building the per-emulator static_library. Signed-off-by: Marc-André Lureau Signed-off-by: Paolo Bonzini

meson: convert target/s390x/gen-features.h

2020-08-21T10:30:17+00:00

Needed by linux-user/s390x/cpu_loop.c; this removes the only use of HOST_CC. Signed-off-by: Marc-André Lureau Signed-off-by: Paolo Bonzini

s390x/tcg: Implement VECTOR FP ADD

2019-06-07T12:53:25+00:00

1. We'll reuse op_vfa() for similar instructions later, prepare for that. 2. We'll reuse vop64_3() for other instructions later. 3. Take care of modifying the vector register only if no trap happened. - on traps, flags are not updated and no elements are modified - traps don't modify the fpc flags - without traps, all exceptions of all elements are merged 4. We'll reuse check_ieee_exc() later when we need the XxC flag. We have to check for exceptions after processing each element. Provide separate handlers for single/all element processing. We'll do the same for all applicable FP instructions. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand

s390x/tcg: Implement VECTOR FIND ANY ELEMENT EQUAL

2019-06-07T12:53:25+00:00

Complicated stuff. Provide two different helpers for CC an !CC handling. We might want to add more helpers later. zero_search() and match_index() are courtesy of Richard H. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand

Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20190521-3' into staging

2019-05-21T15:30:13+00:00

s390x update: - have the bios tolerate bootmap signature entries - next chunk of vector instruction support in tcg - a headers update against Linux 5.2-rc1 - add more facilities and gen15 machines to the cpu model # gpg: Signature made Tue 21 May 2019 16:09:35 BST # gpg: using RSA key C3D0D66DC3624FF6A8C018CEDECF6B93C6F02FAF # gpg: issuer "cohuck@redhat.com" # gpg: Good signature from "Cornelia Huck " [unknown] # gpg: aka "Cornelia Huck " [full] # gpg: aka "Cornelia Huck " [full] # gpg: aka "Cornelia Huck " [unknown] # gpg: aka "Cornelia Huck " [unknown] # Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 2FAF * remotes/cohuck/tags/s390x-20190521-3: (55 commits) s390x/cpumodel: wire up 8561 and 8562 as gen15 machines s390x/cpumodel: add gen15 defintions s390x/cpumodel: add Deflate-conversion facility s390x/cpumodel: enhanced sort facility s390x/cpumodel: vector enhancements s390x/cpumodel: msa9 facility s390x/cpumodel: Miscellaneous-Instruction-Extensions Facility 3 s390x/cpumodel: ignore csske for expansion linux headers: update against Linux 5.2-rc1 update-linux-headers: handle new header file s390x/tcg: Implement VECTOR TEST UNDER MASK s390x/tcg: Implement VECTOR SUM ACROSS WORD s390x/tcg: Implement VECTOR SUM ACROSS QUADWORD s390x/tcg: Implement VECTOR SUM ACROSS DOUBLEWORD s390x/tcg: Implement VECTOR SUBTRACT WITH BORROW COMPUTE BORROW INDICATION s390x/tcg: Implement VECTOR SUBTRACT WITH BORROW INDICATION s390x/tcg: Implement VECTOR SUBTRACT COMPUTE BORROW INDICATION s390x/tcg: Implement VECTOR SUBTRACT s390x/tcg: Implement VECTOR SHIFT RIGHT LOGICAL * s390x/tcg: Implement VECTOR SHIFT RIGHT ARITHMETIC ... Signed-off-by: Peter Maydell

build: replace GENERATED_FILES by generated-files-y

2019-05-17T13:19:39+00:00

When possible use generated-files-$(FLAG) to disable some targets (like KEYCODEMAP_FILES). Suggested-by: Paolo Bonzini Signed-off-by: Laurent Vivier Message-Id: <20190401141222.30034-3-lvivier@redhat.com>

s390x/tcg: Implement VECTOR AVERAGE

2019-05-17T08:54:13+00:00

Handle 32/64-bit elements via gvec expansion and the 8/16 bits via ool helpers. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand

s390x/tcg: Implement VECTOR LOAD TO BLOCK BOUNDARY

2019-03-11T08:31:01+00:00

Very similar to LOAD COUNT TO BLOCK BOUNDARY, but instead of only calculating, the actual vector is loaded. Use a temporary vector to not modify the real vector on exceptions. Initialize that one to zero, to not leak any data. Provide a fast path if we're loading a full vector. As we don't have gvec ool handlers for single vectors, just calculate the vector address manually. We can reuse the helper later on for VECTOR LOAD WITH LENGTH. In fact, we are going to name it "vll" right from the beginning, because that's a better match. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand Message-Id: <20190307121539.12842-15-david@redhat.com> Signed-off-by: Cornelia Huck

s390x/tcg: rearm the CKC timer during migration

2018-07-02T08:37:38+00:00

If the CPU data is migrated after the TOD clock, the CKC timer of a CPU is not rearmed. Let's rearm it when loading the CPU state. Introduce tcg-stub.c just like kvm-stub.c for tcg specific stubs. Reviewed-by: Thomas Huth Signed-off-by: David Hildenbrand Message-Id: <20180627134410.4901-9-david@redhat.com> Signed-off-by: Cornelia Huck

s390x/kvm: factor out SIGP code into sigp.c

2017-10-20T11:32:10+00:00

We want to use the same code base for TCG, so let's cleanly factor it out. The sigp mutex is currently not really needed, as everything is protected by the iothread mutex. But this could change later, so leave it in place and initialize it properly from common code. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand Message-Id: <20170928203708.9376-17-david@redhat.com> Signed-off-by: Cornelia Huck