<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bwlp/qemu.git/target/s390x/gen-features.c, branch spice_video_codecs</title>
<subtitle>Experimental fork of QEMU with video encoding patches</subtitle>
<id>https://git.openslx.org/bwlp/qemu.git/atom/target/s390x/gen-features.c?h=spice_video_codecs</id>
<link rel='self' href='https://git.openslx.org/bwlp/qemu.git/atom/target/s390x/gen-features.c?h=spice_video_codecs'/>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/'/>
<updated>2022-09-26T15:23:11+00:00</updated>
<entry>
<title>target/s390x: support PRNO_TRNG instruction</title>
<updated>2022-09-26T15:23:11+00:00</updated>
<author>
<name>Jason A. Donenfeld</name>
</author>
<published>2022-09-21T10:07:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=3dbc5fdacb5af08dffa408ac7315eae53c4d5497'/>
<id>urn:sha1:3dbc5fdacb5af08dffa408ac7315eae53c4d5497</id>
<content type='text'>
In order for hosts running inside of TCG to initialize the kernel's
random number generator, we should support the PRNO_TRNG instruction,
backed in the usual way with the qemu_guest_getrandom helper. This is
confirmed working on Linux 5.19.

Signed-off-by: Jason A. Donenfeld &lt;Jason@zx2c4.com&gt;
Message-Id: &lt;20220921100729.2942008-2-Jason@zx2c4.com&gt;
Reviewed-by: David Hildenbrand &lt;david@redhat.com&gt;
[thuth: turn prno-trng off in avocado test to avoid breaking it]
Signed-off-by: Thomas Huth &lt;thuth@redhat.com&gt;
</content>
</entry>
<entry>
<title>target/s390x: support SHA-512 extensions</title>
<updated>2022-09-23T13:18:52+00:00</updated>
<author>
<name>Jason A. Donenfeld</name>
</author>
<published>2022-09-22T15:38:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=9f17bfdab422887807cbd5260ed6b0b6e54ddb33'/>
<id>urn:sha1:9f17bfdab422887807cbd5260ed6b0b6e54ddb33</id>
<content type='text'>
In order to fully support MSA_EXT_5, we have to support the SHA-512
special instructions. So implement those.

The implementation began as something TweetNacl-like, and then was
adjusted to be useful here. It's not very beautiful, but it is quite
short and compact, which is what we're going for.

Signed-off-by: Jason A. Donenfeld &lt;Jason@zx2c4.com&gt;
[ restructure, add missing exception, add comments, fixup CPU model ]
Signed-off-by: David Hildenbrand &lt;david@redhat.com&gt;
Message-Id: &lt;20220922153820.221811-1-david@redhat.com&gt;
Signed-off-by: Thomas Huth &lt;thuth@redhat.com&gt;
</content>
</entry>
<entry>
<title>s390x/cpumodel: add stfl197 processor-activity-instrumentation extension 1</title>
<updated>2022-08-25T19:59:04+00:00</updated>
<author>
<name>Christian Borntraeger</name>
</author>
<published>2022-07-27T13:51:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=1d41de5f0524b00a3e1ac0a5b66958466f4332fa'/>
<id>urn:sha1:1d41de5f0524b00a3e1ac0a5b66958466f4332fa</id>
<content type='text'>
Add stfle 197 (processor-activity-instrumentation extension 1) to the
gen16 default model and fence it off for 7.1 and older.

Signed-off-by: Christian Borntraeger &lt;borntraeger@linux.ibm.com&gt;
Reviewed-by: David Hildenbrand &lt;david@redhat.com&gt;
Message-Id: &lt;20220727135120.12784-1-borntraeger@linux.ibm.com&gt;
Acked-by: Cornelia Huck &lt;cohuck@redhat.com&gt;
Signed-off-by: Thomas Huth &lt;thuth@redhat.com&gt;
</content>
</entry>
<entry>
<title>s390: Typo fix FLOATING_POINT_SUPPPORT_ENH</title>
<updated>2022-06-02T16:31:51+00:00</updated>
<author>
<name>Dr. David Alan Gilbert</name>
</author>
<published>2022-05-23T11:51:23+00:00</published>
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<id>urn:sha1:000117066bbea59a9a37ebf9bf7347a029e2f02c</id>
<content type='text'>
One less P needed.

Signed-off-by: Dr. David Alan Gilbert &lt;dgilbert@redhat.com&gt;
Message-Id: &lt;20220523115123.150340-1-dgilbert@redhat.com&gt;
Signed-off-by: Thomas Huth &lt;thuth@redhat.com&gt;
</content>
</entry>
<entry>
<title>target/s390x: add S390_FEAT_VECTOR_ENH2 to qemu CPU model</title>
<updated>2022-05-04T06:47:19+00:00</updated>
<author>
<name>David Miller</name>
</author>
<published>2022-04-28T09:47:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=4f9b6c7ddb2937157a6f87de6bb79a5b93dcea5a'/>
<id>urn:sha1:4f9b6c7ddb2937157a6f87de6bb79a5b93dcea5a</id>
<content type='text'>
[ dh: take care of compat machines ]

Signed-off-by: David Miller &lt;dmiller423@gmail.com&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Signed-off-by: David Hildenbrand &lt;david@redhat.com&gt;
Message-Id: &lt;20220428094708.84835-13-david@redhat.com&gt;
Signed-off-by: Thomas Huth &lt;thuth@redhat.com&gt;
</content>
</entry>
<entry>
<title>s390x/cpu_models: make "max" match the unmodified "qemu" CPU model under TCG</title>
<updated>2022-05-04T06:47:19+00:00</updated>
<author>
<name>David Hildenbrand</name>
</author>
<published>2022-04-28T09:46:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=d98ed7d96e2951b5e5c92b0f1de9aa2e58889019'/>
<id>urn:sha1:d98ed7d96e2951b5e5c92b0f1de9aa2e58889019</id>
<content type='text'>
Before we were able to bump up the qemu CPU model to a z13, we included
some experimental features during development in the "max" model only.
Nowadays, the "max" model corresponds exactly to the "qemu" CPU model
of the latest QEMU machine under TCG.

Let's remove all the special casing, effectively making both models
match completely from now on, and clean up.

Signed-off-by: David Hildenbrand &lt;david@redhat.com&gt;
Reviewed-by: Cornelia Huck &lt;cohuck@redhat.com&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Message-Id: &lt;20220428094708.84835-4-david@redhat.com&gt;
Signed-off-by: Thomas Huth &lt;thuth@redhat.com&gt;
</content>
</entry>
<entry>
<title>s390x/cpu_models: drop "msa5" from the TCG "max" model</title>
<updated>2022-05-04T06:47:19+00:00</updated>
<author>
<name>David Hildenbrand</name>
</author>
<published>2022-04-28T09:46:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=4756b106b372e525365c62b41df38052571c0a71'/>
<id>urn:sha1:4756b106b372e525365c62b41df38052571c0a71</id>
<content type='text'>
We don't include the "msa5" feature in the "qemu" model because it
generates a warning. The PoP states:

"The message-security-assist extension 5 requires
the secure-hash-algorithm (SHA-512) capabilities of
the message-security-assist extension 2 as a prereq-
uisite. (March, 2015)"

As SHA-512 won't be supported in the near future, let's just drop the
feature from the "max" model. This avoids the warning and allows us for
making the "max" model match the "qemu" model (except for compat
machines). We don't lose much, as we only implement the function stubs
for MSA, excluding any real subfunctions.

Signed-off-by: David Hildenbrand &lt;david@redhat.com&gt;
Reviewed-by: Thomas Huth &lt;thuth@redhat.com&gt;
Reviewed-by: Cornelia Huck &lt;cohuck@redhat.com&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/897
Message-Id: &lt;20220428094708.84835-3-david@redhat.com&gt;
Signed-off-by: Thomas Huth &lt;thuth@redhat.com&gt;
</content>
</entry>
<entry>
<title>s390x/cpumodel: Bump up QEMU model to a stripped-down IBM z15 GA1</title>
<updated>2022-02-28T10:29:15+00:00</updated>
<author>
<name>David Miller</name>
</author>
<published>2022-02-23T22:31:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=8a4eafb69cd92d323ab05850b72005e11f7a4201'/>
<id>urn:sha1:8a4eafb69cd92d323ab05850b72005e11f7a4201</id>
<content type='text'>
TCG implements everything we need to run basic z15 OS+software

Signed-off-by: David Miller &lt;dmiller423@gmail.com&gt;
Message-Id: &lt;20220223223117.66660-3-dmiller423@gmail.com&gt;
Reviewed-by: David Hildenbrand &lt;david@redhat.com&gt;
Signed-off-by: Thomas Huth &lt;thuth@redhat.com&gt;
</content>
</entry>
<entry>
<title>s390x/tcg: Implement Miscellaneous-Instruction-Extensions Facility 3 for the s390x</title>
<updated>2022-02-28T10:29:15+00:00</updated>
<author>
<name>David Miller</name>
</author>
<published>2022-02-23T22:31:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=ea0a1053e276f07b1a75b222115810e8cee71fa9'/>
<id>urn:sha1:ea0a1053e276f07b1a75b222115810e8cee71fa9</id>
<content type='text'>
implements:
AND WITH COMPLEMENT   (NCRK, NCGRK)
NAND                  (NNRK, NNGRK)
NOT EXCLUSIVE OR      (NXRK, NXGRK)
NOR                   (NORK, NOGRK)
OR WITH COMPLEMENT    (OCRK, OCGRK)
SELECT                (SELR, SELGR)
SELECT HIGH           (SELFHR)
MOVE RIGHT TO LEFT    (MVCRL)
POPULATION COUNT      (POPCNT)

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/737
Signed-off-by: David Miller &lt;dmiller423@gmail.com&gt;
Message-Id: &lt;20220223223117.66660-2-dmiller423@gmail.com&gt;
Reviewed-by: David Hildenbrand &lt;david@redhat.com&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Signed-off-by: Thomas Huth &lt;thuth@redhat.com&gt;
</content>
</entry>
<entry>
<title>s390x/cpumodel: Add more feature to gen16 default model</title>
<updated>2021-09-07T11:36:43+00:00</updated>
<author>
<name>Christian Borntraeger</name>
</author>
<published>2021-09-07T10:10:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=30e398f796d882d829162a16ab7c920f7422da3b'/>
<id>urn:sha1:30e398f796d882d829162a16ab7c920f7422da3b</id>
<content type='text'>
Add the new gen16 features to the default model and fence them for
machine version 6.1 and earlier.

Signed-off-by: Christian Borntraeger &lt;borntraeger@de.ibm.com&gt;
Reviewed-by: David Hildenbrand &lt;david@redhat.com&gt;
Message-Id: &lt;20210907101017.27126-1-borntraeger@de.ibm.com&gt;
Signed-off-by: Thomas Huth &lt;thuth@redhat.com&gt;
</content>
</entry>
</feed>
