bwlp/qemu.git/tcg/README, branch master

tcg: Document ctpop opcodes

2021-11-11T10:47:01+00:00

Fixes: a768e4e99247 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/658 Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson

tcg: Add flags argument to bswap opcodes

2021-06-29T17:04:57+00:00

This will eventually simplify front-end usage, and will allow backends to unset TCG_TARGET_HAS_MEMORY_BSWAP without loss of optimization. The argument is added during expansion, not currently exposed to the front end translators. The backends currently only support a flags value of either TCG_BSWAP_IZ, or (TCG_BSWAP_IZ | TCG_BSWAP_OZ), since they all require zero top bytes and leave them that way. At the existing call sites we pass in (TCG_BSWAP_IZ | TCG_BSWAP_OZ), except for the flags-ignored cases of a 32-bit swap of a 32-bit value and or a 64-bit swap of a 64-bit value, where we pass 0. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson

docs: fix references to docs/devel/atomics.rst

2021-06-02T04:51:09+00:00

Commit 15e8699f00 ("atomics: convert to reStructuredText") converted docs/devel/atomics.txt to docs/devel/atomics.rst. We still have several references to the old file, so let's fix them with the following command: sed -i s/atomics.txt/atomics.rst/ $(git grep -l docs/devel/atomics.txt) Signed-off-by: Stefano Garzarella Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20210517151702.109066-3-sgarzare@redhat.com> Signed-off-by: Thomas Huth

tcg: Introduce INDEX_op_qemu_st8_i32

2021-01-07T15:09:06+00:00

Enable this on i386 to restrict the set of input registers for an 8-bit store, as required by the architecture. This removes the last use of scratch registers for user-only mode. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson

meson: rename included C source files to .c.inc

2020-08-21T10:18:30+00:00

With Makefiles that have automatically generated dependencies, you generated includes are set as dependencies of the Makefile, so that they are built before everything else and they are available when first building the .c files. Alternatively you can use a fine-grained dependency, e.g. target/arm/translate.o: target/arm/decode-neon-shared.inc.c With Meson you have only one choice and it is a third option, namely "build at the beginning of the corresponding target"; the way you express it is to list the includes in the sources of that target. The problem is that Meson decides if something is a source vs. a generated include by looking at the extension: '.c', '.cc', '.m', '.C' are sources, while everything else is considered an include---including '.inc.c'. Use '.c.inc' to avoid this, as it is consistent with our other convention of using '.rst.inc' for included reStructuredText files. The editorconfig file is adjusted. Signed-off-by: Paolo Bonzini

tcg: Implement gvec support for rotate by vector

2020-06-02T15:42:37+00:00

No host backend support yet, but the interfaces for rotlv and rotrv are in place. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- v3: Drop the generic expansion from rot to shift; we can do better for each backend, and then this code becomes unused.

tcg: Implement gvec support for rotate by immediate

2020-06-02T15:42:37+00:00

No host backend support yet, but the interfaces for rotli are in place. Canonicalize immediate rotate to the left, based on a survey of architectures, but provide both left and right shift interfaces to the translators. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson

Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190903' into staging

2019-09-04T15:29:18+00:00

Allow page table bit to swap endianness. Reorganize watchpoints out of i/o path. Return host address from probe_write / probe_access. # gpg: Signature made Tue 03 Sep 2019 16:47:50 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson " [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-tcg-20190903: (36 commits) tcg: Factor out probe_write() logic into probe_access() tcg: Make probe_write() return a pointer to the host page s390x/tcg: Pass a size to probe_write() in do_csst() hppa/tcg: Call probe_write() also for CONFIG_USER_ONLY mips/tcg: Call probe_write() for CONFIG_USER_ONLY as well tcg: Enforce single page access in probe_write() tcg: Factor out CONFIG_USER_ONLY probe_write() from s390x code s390x/tcg: Fix length calculation in probe_write_access() s390x/tcg: Use guest_addr_valid() instead of h2g_valid() in probe_write_access() tcg: Check for watchpoints in probe_write() cputlb: Handle watchpoints via TLB_WATCHPOINT cputlb: Remove double-alignment in store_helper cputlb: Fix size operand for tlb_fill on unaligned store exec: Factor out cpu_watchpoint_address_matches cputlb: Fold TLB_RECHECK into TLB_INVALID_MASK exec: Factor out core logic of check_watchpoint() exec: Move user-only watchpoint stubs inline target/sparc: sun4u Invert Endian TTE bit target/sparc: Add TLB entry with attributes cputlb: Byte swap memory transaction attribute ... Signed-off-by: Peter Maydell

tcg: TCGMemOp is now accelerator independent MemOp

2019-09-03T15:30:38+00:00

Preparation for collapsing the two byte swaps, adjust_endianness and handle_bswap, along the I/O path. Target dependant attributes are conditionalized upon NEED_CPU_H. Signed-off-by: Tony Nguyen Acked-by: David Gibson Reviewed-by: Richard Henderson Acked-by: Cornelia Huck Message-Id: <81d9cd7d7f5aaadfa772d6c48ecee834e9cf7882.1566466906.git.tony.nguyen@bt.com> Signed-off-by: Richard Henderson

tcg/README: fix typo s/afterwise/afterwards/

2019-09-03T15:20:35+00:00

Afterwise is "wise after the fact", as in "hindsight". Here we meant "afterwards" (as in "subsequently"). Fix it. Reviewed-by: Alex Bennée Signed-off-by: Emilio G. Cota Reviewed-by: Richard Henderson Signed-off-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Message-id: 20190828165307.18321-7-alex.bennee@linaro.org Signed-off-by: Peter Maydell