Experimental fork of QEMU with video encoding patches https://git.openslx.org/bwlp/qemu.git/atom/tcg/aarch64/tcg-target.h?h=spice_video_codecs 2022-03-04T18:50:41+00:00 2022-03-04T18:50:41+00:00 Richard Henderson 2021-12-16T19:17:46+00:00 urn:sha1:ed5234735af0c9ddc120ba2297e47714c5126abd We've had placeholders for these opcodes for a while, and should have support on ppc, s390x and avx512 hosts. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> 2022-02-08T21:55:02+00:00 Richard Henderson 2021-08-03T20:07:57+00:00 urn:sha1:f85ab3d2e51e45e7fa33b539bc7e1350bdf64dde Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> 2021-07-10T03:23:38+00:00 Richard Henderson 2021-06-29T21:47:39+00:00 urn:sha1:f4e01e30217b6778e478cf00975daed7a54bc051 Since 6eea04347eb6, all tcg backends support goto_ptr. Remove the conditional, making support mandatory. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> 2021-06-29T17:04:57+00:00 Richard Henderson 2021-06-13T23:49:23+00:00 urn:sha1:51c559c761de3ee94b06e931454d86995d86d013 The memory bswap support in the aarch64 backend merely dates from a time when it was required. There is nothing special about the backend support that could not have been provided by the middle-end even prior to the introduction of the bswap flags. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> 2021-06-11T16:27:08+00:00 Richard Henderson 2021-03-10T05:30:38+00:00 urn:sha1:26a75d12d33ff80ee797ca32373f6333da4f194f Remove the ifdef ladder and move each define into the appropriate header file. Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> 2021-01-07T15:09:42+00:00 Richard Henderson 2020-11-05T23:37:02+00:00 urn:sha1:de2fac62d24f82b36c4d002dda9662d0a23766a9 Now that all native tcg hosts support splitwx, remove the define. Replace the one use with a test for CONFIG_TCG_INTERPRETER. Reviewed-by: Joelle van Dyne <j@getutm.app> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> 2021-01-07T15:09:42+00:00 Richard Henderson 2020-10-29T21:37:16+00:00 urn:sha1:ffba3eb34b71a28bf15da85badbeb56c1be8ac45 Reviewed-by: Joelle van Dyne <j@getutm.app> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> 2021-01-07T15:09:41+00:00 Richard Henderson 2020-10-29T03:50:29+00:00 urn:sha1:a35b3e14157b9d912898d4800f329dc5f3c200a6 Plumb the value through to alloc_code_gen_buffer. This is not supported by any os or tcg backend, so for now enabling it will result in an error. Reviewed-by: Joelle van Dyne <j@getutm.app> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> 2021-01-07T15:09:41+00:00 Richard Henderson 2020-10-29T06:30:21+00:00 urn:sha1:1acbad0f278ad585bbfc46081b5b639447585be0 Pass both rx and rw addresses to tb_target_set_jmp_target. Reviewed-by: Joelle van Dyne <j@getutm.app> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> 2021-01-07T15:09:06+00:00 Richard Henderson 2020-12-09T19:58:39+00:00 urn:sha1:07ce0b05300de5bc8f1932a4cfbe38f3323e5ab1 Enable this on i386 to restrict the set of input registers for an 8-bit store, as required by the architecture. This removes the last use of scratch registers for user-only mode. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>