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<title>bwlp/qemu.git/tcg/mips, branch master</title>
<subtitle>Experimental fork of QEMU with video encoding patches</subtitle>
<id>https://git.openslx.org/bwlp/qemu.git/atom/tcg/mips?h=master</id>
<link rel='self' href='https://git.openslx.org/bwlp/qemu.git/atom/tcg/mips?h=master'/>
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<updated>2022-04-06T08:50:37+00:00</updated>
<entry>
<title>Replace config-time define HOST_WORDS_BIGENDIAN</title>
<updated>2022-04-06T08:50:37+00:00</updated>
<author>
<name>Marc-André Lureau</name>
</author>
<published>2022-03-23T15:57:17+00:00</published>
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<id>urn:sha1:e03b56863d2bca3e649e81531c1b0299524481ae</id>
<content type='text'>
Replace a config-time define with a compile time condition
define (compatible with clang and gcc) that must be declared prior to
its usage. This avoids having a global configure time define, but also
prevents from bad usage, if the config header wasn't included before.

This can help to make some code independent from qemu too.

gcc supports __BYTE_ORDER__ from about 4.6 and clang from 3.2.

Signed-off-by: Marc-André Lureau &lt;marcandre.lureau@redhat.com&gt;
[ For the s390x parts I'm involved in ]
Acked-by: Halil Pasic &lt;pasic@linux.ibm.com&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Message-Id: &lt;20220323155743.1585078-7-marcandre.lureau@redhat.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>tcg/mips: Support unaligned access for softmmu</title>
<updated>2022-02-08T21:55:02+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2021-08-06T16:55:14+00:00</published>
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<id>urn:sha1:d9e52834656ffa766113f1fbae8efe37aaac1df2</id>
<content type='text'>
We can use the routines just added for user-only to emit
unaligned accesses in softmmu mode too.

Tested-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Reviewed-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>tcg/mips: Support unaligned access for user-only</title>
<updated>2022-02-08T21:55:02+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2021-08-06T15:49:16+00:00</published>
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<id>urn:sha1:23a79c113ed2ae693d882d109862f4a759fbf10e</id>
<content type='text'>
This is kinda sorta the opposite of the other tcg hosts, where
we get (normal) alignment checks for free with host SIGBUS and
need to add code to support unaligned accesses.

Fortunately, the ISA contains pairs of instructions that are
used to implement unaligned memory accesses.  Use them.

Tested-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Reviewed-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>exec/memop: Adding signedness to quad definitions</title>
<updated>2022-01-08T05:46:10+00:00</updated>
<author>
<name>Frédéric Pétrot</name>
</author>
<published>2022-01-06T21:00:51+00:00</published>
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<id>urn:sha1:fc313c64345453c7a668d765610dfd7135e21a98</id>
<content type='text'>
Renaming defines for quad in their various forms so that their signedness is
now explicit.
Done using git grep as suggested by Philippe, with a bit of hand edition to
keep assignments aligned.

Signed-off-by: Frédéric Pétrot &lt;frederic.petrot@univ-grenoble-alpes.fr&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Reviewed-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Message-id: 20220106210108.138226-2-frederic.petrot@univ-grenoble-alpes.fr
Signed-off-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
</content>
</entry>
<entry>
<title>tcg: Rename TCGMemOpIdx to MemOpIdx</title>
<updated>2021-10-05T23:53:17+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2021-07-25T22:06:49+00:00</published>
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<id>urn:sha1:9002ffcb7264947d9a193567b457dea42f15c321</id>
<content type='text'>
We're about to move this out of tcg.h, so rename it
as we did when moving MemOp.

Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>tcg: Expand MO_SIZE to 3 bits</title>
<updated>2021-10-05T23:53:17+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2021-07-26T20:32:17+00:00</published>
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<id>urn:sha1:4b473e0c60d802bb69accab3177d350fc580e2a4</id>
<content type='text'>
We have lacked expressive support for memory sizes larger
than 64-bits for a while.  Fixing that requires adjustment
to several points where we used this for array indexing,
and two places that develop -Wswitch warnings after the change.

Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>tcg/mips: Unset TCG_TARGET_HAS_direct_jump</title>
<updated>2021-09-22T02:36:44+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2021-08-06T17:49:03+00:00</published>
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<id>urn:sha1:5a8f0a5dd2a9dcb60355158d04e8e8a5d41fdec6</id>
<content type='text'>
Only use indirect jumps.  Finish weaning away from the
unique alignment requirements for code_gen_buffer.

Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>tcg/mips: Allow JAL to be out of range in tcg_out_bswap_subr</title>
<updated>2021-09-22T02:36:44+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2021-08-06T18:03:45+00:00</published>
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<id>urn:sha1:d7fc9f48c3056dc1a1e69d095858742f012ae910</id>
<content type='text'>
Weaning off of unique alignment requirements, so allow JAL
to not reach the target.  TCG_TMP1 is always available for
use as a scratch because it is clobbered by the subroutine
being called.

Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>tcg/mips: Drop inline markers</title>
<updated>2021-09-22T02:36:44+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2021-08-06T17:04:00+00:00</published>
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<id>urn:sha1:10d4af5810ab0250418e34e40be817932f26ff95</id>
<content type='text'>
Let the compiler decide about inlining.
Remove tcg_out_ext8s and tcg_out_ext16s as unused.

Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>tcg: Remove TCG_TARGET_HAS_goto_ptr</title>
<updated>2021-07-10T03:23:38+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2021-06-29T21:47:39+00:00</published>
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<id>urn:sha1:f4e01e30217b6778e478cf00975daed7a54bc051</id>
<content type='text'>
Since 6eea04347eb6, all tcg backends support goto_ptr.
Remove the conditional, making support mandatory.

Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
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