bwlp/qemu.git/tcg/riscv, branch spice_video_codecs

Replace config-time define HOST_WORDS_BIGENDIAN

2022-04-06T08:50:37+00:00

Replace a config-time define with a compile time condition define (compatible with clang and gcc) that must be declared prior to its usage. This avoids having a global configure time define, but also prevents from bad usage, if the config header wasn't included before. This can help to make some code independent from qemu too. gcc supports __BYTE_ORDER__ from about 4.6 and clang from 3.2. Signed-off-by: Marc-André Lureau [ For the s390x parts I'm involved in ] Acked-by: Halil Pasic Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20220323155743.1585078-7-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini

tcg/riscv: Support raising sigbus for user-only

2022-02-08T21:55:02+00:00

Signed-off-by: Richard Henderson

exec/memop: Adding signedness to quad definitions

2022-01-08T05:46:10+00:00

Renaming defines for quad in their various forms so that their signedness is now explicit. Done using git grep as suggested by Philippe, with a bit of hand edition to keep assignments aligned. Signed-off-by: Frédéric Pétrot Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Message-id: 20220106210108.138226-2-frederic.petrot@univ-grenoble-alpes.fr Signed-off-by: Alistair Francis

tcg: Rename TCGMemOpIdx to MemOpIdx

2021-10-05T23:53:17+00:00

We're about to move this out of tcg.h, so rename it as we did when moving MemOp. Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson

tcg: Expand MO_SIZE to 3 bits

2021-10-05T23:53:17+00:00

We have lacked expressive support for memory sizes larger than 64-bits for a while. Fixing that requires adjustment to several points where we used this for array indexing, and two places that develop -Wswitch warnings after the change. Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson

tcg/riscv: Remove add with zero on user-only memory access

2021-09-22T02:36:44+00:00

Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Signed-off-by: Richard Henderson

tcg: Remove TCG_TARGET_HAS_goto_ptr

2021-07-10T03:23:38+00:00

Since 6eea04347eb6, all tcg backends support goto_ptr. Remove the conditional, making support mandatory. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson

tcg/riscv: Remove MO_BSWAP handling

2021-06-29T17:04:57+00:00

TCG_TARGET_HAS_MEMORY_BSWAP is already unset for this backend, which means that MO_BSWAP be handled by the middle-end and will never be seen by the backend. Thus the indexes used with qemu_{ld,st}_helpers will always be zero. Tidy the comments and asserts in tcg_out_qemu_{ld,st}_direct. It is not that we do not handle bswap "yet", but never will. Acked-by: Alistair Francis Signed-off-by: Richard Henderson

tcg: Move MAX_CODE_GEN_BUFFER_SIZE to tcg-target.h

2021-06-11T16:27:08+00:00

Remove the ifdef ladder and move each define into the appropriate header file. Reviewed-by: Luis Pires Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson

tcg: Change parameters for tcg_target_const_match

2021-06-04T18:50:11+00:00

Change the return value to bool, because that's what is should have been from the start. Pass the ct mask instead of the whole TCGArgConstraint, as that's the only part that's relevant. Change the value argument to int64_t. We will need the extra width for 32-bit hosts wanting to match vector constants. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson