<feed xmlns='http://www.w3.org/2005/Atom'>
<title>bwlp/qemu.git/tcg/s390, branch master</title>
<subtitle>Experimental fork of QEMU with video encoding patches</subtitle>
<id>https://git.openslx.org/bwlp/qemu.git/atom/tcg/s390?h=master</id>
<link rel='self' href='https://git.openslx.org/bwlp/qemu.git/atom/tcg/s390?h=master'/>
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<updated>2021-10-05T23:53:17+00:00</updated>
<entry>
<title>tcg/s390x: Rename from tcg/s390</title>
<updated>2021-10-05T23:53:17+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2020-09-14T22:15:31+00:00</published>
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<id>urn:sha1:3704993f545efbe7b5a9ede83525f0d9c07cb31f</id>
<content type='text'>
This emphasizes that we don't support s390, only 64-bit s390x hosts.

Reviewed-by: Thomas Huth &lt;thuth@redhat.com&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Reviewed-by: David Hildenbrand &lt;david@redhat.com&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>tcg: Rename TCGMemOpIdx to MemOpIdx</title>
<updated>2021-10-05T23:53:17+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2021-07-25T22:06:49+00:00</published>
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<id>urn:sha1:9002ffcb7264947d9a193567b457dea42f15c321</id>
<content type='text'>
We're about to move this out of tcg.h, so rename it
as we did when moving MemOp.

Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>tcg: Expand MO_SIZE to 3 bits</title>
<updated>2021-10-05T23:53:17+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2021-07-26T20:32:17+00:00</published>
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<id>urn:sha1:4b473e0c60d802bb69accab3177d350fc580e2a4</id>
<content type='text'>
We have lacked expressive support for memory sizes larger
than 64-bits for a while.  Fixing that requires adjustment
to several points where we used this for array indexing,
and two places that develop -Wswitch warnings after the change.

Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>tcg: Remove TCG_TARGET_HAS_goto_ptr</title>
<updated>2021-07-10T03:23:38+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2021-06-29T21:47:39+00:00</published>
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<id>urn:sha1:f4e01e30217b6778e478cf00975daed7a54bc051</id>
<content type='text'>
Since 6eea04347eb6, all tcg backends support goto_ptr.
Remove the conditional, making support mandatory.

Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>tcg/s390: Support bswap flags</title>
<updated>2021-06-29T17:04:57+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2021-06-13T18:15:41+00:00</published>
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<id>urn:sha1:1619ee9e93ed8f7bbbae61b946c56bd34713d4ac</id>
<content type='text'>
For INDEX_op_bswap16_i64, use 64-bit instructions so that we can
easily provide the extension to 64-bits.  Drop the special case,
previously used, where the input is already zero-extended -- the
minor code size savings is not worth the complication.

Reviewed-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>tcg: Move MAX_CODE_GEN_BUFFER_SIZE to tcg-target.h</title>
<updated>2021-06-11T16:27:08+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2021-03-10T05:30:38+00:00</published>
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<id>urn:sha1:26a75d12d33ff80ee797ca32373f6333da4f194f</id>
<content type='text'>
Remove the ifdef ladder and move each define into the
appropriate header file.

Reviewed-by: Luis Pires &lt;luis.pires@eldorado.org.br&gt;
Reviewed-by: Alex Bennée &lt;alex.bennee@linaro.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>tcg: Change parameters for tcg_target_const_match</title>
<updated>2021-06-04T18:50:11+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2021-05-03T23:47:37+00:00</published>
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<id>urn:sha1:a4fbbd779a29b912299bc2830f0157513080ddb7</id>
<content type='text'>
Change the return value to bool, because that's what is should
have been from the start.  Pass the ct mask instead of the whole
TCGArgConstraint, as that's the only part that's relevant.

Change the value argument to int64_t.  We will need the extra
width for 32-bit hosts wanting to match vector constants.

Reviewed-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>tcg: Fix prototypes for tcg_out_vec_op and tcg_out_op</title>
<updated>2021-03-17T15:04:45+00:00</updated>
<author>
<name>Miroslav Rezanina</name>
</author>
<published>2021-03-12T12:14:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=5e8892db93f3fb6a7221f2d47f3c952a7e489737'/>
<id>urn:sha1:5e8892db93f3fb6a7221f2d47f3c952a7e489737</id>
<content type='text'>
There are two different versions of prototype for tcg_out_op and
tcg_out_vec_op functions:

1) using const TCGArg *args and const int *const_args arguments
2) using const TCGArg args[TCG_MAX_OP_ARGS] and const int
   const_args[TCG_MAX_OP_ARGS] aguments.

This duality causes warnings on GCC 11 and prevents build using
--enable-werror.  As second version provides more information,
unify functions prototypes to this variant.

Signed-off-by: Miroslav Rezanina &lt;mrezanin@redhat.com&gt;
Message-Id: &lt;20210312121418.139093-1-mrezanin@redhat.com&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>tcg/s390: Fix compare instruction from extended-immediate facility</title>
<updated>2021-02-05T20:24:14+00:00</updated>
<author>
<name>Philippe Mathieu-Daudé</name>
</author>
<published>2021-02-04T18:29:02+00:00</published>
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<id>urn:sha1:8e43c5a1f289ce002e9d26108af658c8d064dea1</id>
<content type='text'>
The code is currently comparing c2 to the type promotion of
uint32_t and int32_t. That is, the conversion rules are as:

  (common_type) c2 == (common_type) (uint32_t)
                        (is_unsigned
                        ? (uint32_t)c2
                        : (uint32_t)(int32_t)c2)

In the signed case we lose the desired sign extensions because
of the argument promotion rules of the ternary operator.

Solve the problem by doing the round-trip parsing through the
intermediate type and back to the desired common type (all at
one expression).

Fixes: a534bb15f30 ("tcg/s390: Use constant pool for cmpi")
Tested-by: Richard W.M. Jones &lt;rjones@redhat.com&gt;
Reviewed-by: David Hildenbrand &lt;david@redhat.com&gt;
Reported-by: Miroslav Rezanina &lt;mrezanin@redhat.com&gt;
Reported-by: Richard W.M. Jones &lt;rjones@redhat.com&gt;
Suggested-by: David Hildenbrand &lt;david@redhat.com&gt;
Suggested-by: Eric Blake &lt;eblake@redhat.com&gt;
Signed-off-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Message-Id: &lt;20210204182902.1742826-1-f4bug@amsat.org&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
<entry>
<title>tcg: Remove TCG_TARGET_CON_SET_H</title>
<updated>2021-02-02T22:12:43+00:00</updated>
<author>
<name>Richard Henderson</name>
</author>
<published>2020-10-17T18:38:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.openslx.org/bwlp/qemu.git/commit/?id=0c823e596877a30fd6c17a1ae9f98218a53055ea'/>
<id>urn:sha1:0c823e596877a30fd6c17a1ae9f98218a53055ea</id>
<content type='text'>
All backends have now been converted to tcg-target-con-set.h,
so we can remove the fallback code.

Reviewed-by: Peter Maydell &lt;peter.maydell@linaro.org&gt;
Reviewed-by: Alistair Francis &lt;alistair.francis@wdc.com&gt;
Signed-off-by: Richard Henderson &lt;richard.henderson@linaro.org&gt;
</content>
</entry>
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