bwlp/qemu.git/tests/tcg/arm, branch master

tests/tcg: clean up calls to run-test

2022-10-06T10:53:40+00:00

Almost all invocations of run-test have either "$* on $(TARGET_NAME)" or "$< on $(TARGET_NAME)" as the last argument. So provide a default test name, while allowing an escape hatch for custom names. As an additional simplification, remove the need to do shell quoting. Signed-off-by: Paolo Bonzini Signed-off-by: Alex Bennée Message-Id: <20220929114231.583801-24-alex.bennee@linaro.org>

test/tcg/arm: Use -mfloat-abi=soft for test-armv6m-undef

2022-06-13T23:14:59+00:00

GCC11 from crossbuild-essential-armhf from ubuntu 22.04 errors: cc1: error: ‘-mfloat-abi=hard’: selected architecture lacks an FPU Signed-off-by: Richard Henderson Reviewed-by: Thomas Huth Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20220604032713.174976-1-richard.henderson@linaro.org> Signed-off-by: Alex Bennée Message-Id: <20220613171258.1905715-2-alex.bennee@linaro.org>

tests/tcg: add float_convd test

2022-04-20T15:04:20+00:00

This is a simple transliteration of the float_convs test but this time working with doubles. I'm used it to test the handling of vector registers in gdbstub but wasn't able to find a non-ugly way to automate it. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson Message-Id: <20220419091020.3008144-23-alex.bennee@linaro.org>

tests/tcg: add vectorised sha512 versions

2022-02-28T16:42:35+00:00

This builds vectorised versions of sha512 to exercise the vector code: - aarch64 (AdvSimd) - i386 (SSE) - s390x (MVX) - ppc64/ppc64le (power10 vectors) Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson Message-Id: <20220225172021.3493923-14-alex.bennee@linaro.org>

tests/tcg: build sha1-vector with O3 and compare

2022-02-28T16:42:25+00:00

The aim of this is to test code generation for vectorised operations. Unfortunately gcc struggles to do much with the messy sha1 code (try -fopt-info-vec-missed to see why). However it's better than nothing. We assume the non-vectorised output is gold and baring compiler bugs the outputs should match. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson Message-Id: <20220225172021.3493923-12-alex.bennee@linaro.org>

tests/tcg: Add arm and aarch64 pc alignment tests

2021-12-15T10:35:26+00:00

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Signed-off-by: Peter Maydell

semihosting: move semihosting tests to multiarch

2021-03-24T14:25:03+00:00

It may be arm-compat-semihosting but more than one architecture uses it so lets move the tests into the multiarch area. We gate it on the feature and split the semicall.h header between the arches. Also clean-up a bit of the Makefile messing about to one common set of runners. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson Message-Id: <20210323165308.15244-6-alex.bennee@linaro.org>

tests: remove GCC < 4 fallbacks

2020-12-15T17:52:10+00:00

Since commit efc6c07 ("configure: Add a test for the minimum compiler version"), QEMU explicitely depends on GCC >= 4.8. (clang >= 3.4 advertizes itself as GCC >= 4.2 compatible) Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Acked-by: Alex Bennée Message-Id: <20201210134752.780923-6-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini

tests/tcg: build plugin list from contents of src directory

2020-06-16T13:49:05+00:00

If you jump back and forth between branches while developing plugins you end up debugging failures caused by plugins left in the build directory. Fix this by basing plugins on the source tree instead. Signed-off-by: Alex Bennée Message-Id: <20200615141922.18829-2-alex.bennee@linaro.org>

tests/tcg: add simple commpage test case

2020-06-08T16:04:19+00:00

The COMMPAGE are a number of kernel provided user-space routines for 32 bit ARM systems. Add a basic series of smoke tests to ensure it is working as it should. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson Message-Id: <20200605154929.26910-14-alex.bennee@linaro.org>