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| author | David Woodhouse | 2022-03-14 15:25:43 +0100 |
|---|---|---|
| committer | Michael S. Tsirkin | 2022-05-16 10:38:40 +0200 |
| commit | 175f3a59863d7263597011ae86bc57108539ba35 (patch) | |
| tree | d79d2fd4b1a4725579fcbce9f37c2fd891d171f3 | |
| parent | intel_iommu: Support IR-only mode without DMA translation (diff) | |
| download | qemu-175f3a59863d7263597011ae86bc57108539ba35.tar.gz qemu-175f3a59863d7263597011ae86bc57108539ba35.tar.xz qemu-175f3a59863d7263597011ae86bc57108539ba35.zip | |
intel_iommu: Only allow interrupt remapping to be enabled if it's supported
We should probably check if we were meant to be exposing IR, before
letting the guest turn the IRE bit on.
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Peter Xu <peterx@redhat.com>
Acked-by: Jason Wang <jasowang@redhat.com>
Message-Id: <20220314142544.150555-3-dwmw2@infradead.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| -rw-r--r-- | hw/i386/intel_iommu.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index b22376a45d..d3361c8313 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -2209,6 +2209,7 @@ static void vtd_handle_gcmd_ire(IntelIOMMUState *s, bool en) /* Handle write to Global Command Register */ static void vtd_handle_gcmd_write(IntelIOMMUState *s) { + X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(s); uint32_t status = vtd_get_long_raw(s, DMAR_GSTS_REG); uint32_t val = vtd_get_long_raw(s, DMAR_GCMD_REG); uint32_t changed = status ^ val; @@ -2230,7 +2231,8 @@ static void vtd_handle_gcmd_write(IntelIOMMUState *s) /* Set/update the interrupt remapping root-table pointer */ vtd_handle_gcmd_sirtp(s); } - if (changed & VTD_GCMD_IRE) { + if ((changed & VTD_GCMD_IRE) && + x86_iommu_ir_supported(x86_iommu)) { /* Interrupt remap enable/disable */ vtd_handle_gcmd_ire(s, val & VTD_GCMD_IRE); } |