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| author | Richard Henderson | 2012-10-16 11:32:27 +0200 |
|---|---|---|
| committer | Blue Swirl | 2012-10-20 09:56:07 +0200 |
| commit | aeff993cc59ea043c8d33e3dc3584c61aa31f347 (patch) | |
| tree | 44701fa18ab121bb7628ba0bb124e7c5ca146c82 | |
| parent | target-sparc: Don't use a temporary for gen_dest_fpr_D (diff) | |
| download | qemu-aeff993cc59ea043c8d33e3dc3584c61aa31f347.tar.gz qemu-aeff993cc59ea043c8d33e3dc3584c61aa31f347.tar.xz qemu-aeff993cc59ea043c8d33e3dc3584c61aa31f347.zip | |
target-sparc: Remove cpu_tmp64 use from softint insns
The use of "tl" functions and a tmp64 is logically incompatible.
Use cpu_tmp0 instead.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| -rw-r--r-- | target-sparc/translate.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 00ceb9debe..64feaa326d 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -3655,20 +3655,20 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn) case 0x14: /* Softint set */ if (!supervisor(dc)) goto illegal_insn; - tcg_gen_xor_tl(cpu_tmp64, cpu_src1, cpu_src2); - gen_helper_set_softint(cpu_env, cpu_tmp64); + tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2); + gen_helper_set_softint(cpu_env, cpu_tmp0); break; case 0x15: /* Softint clear */ if (!supervisor(dc)) goto illegal_insn; - tcg_gen_xor_tl(cpu_tmp64, cpu_src1, cpu_src2); - gen_helper_clear_softint(cpu_env, cpu_tmp64); + tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2); + gen_helper_clear_softint(cpu_env, cpu_tmp0); break; case 0x16: /* Softint write */ if (!supervisor(dc)) goto illegal_insn; - tcg_gen_xor_tl(cpu_tmp64, cpu_src1, cpu_src2); - gen_helper_write_softint(cpu_env, cpu_tmp64); + tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2); + gen_helper_write_softint(cpu_env, cpu_tmp0); break; case 0x17: /* Tick compare */ #if !defined(CONFIG_USER_ONLY) |