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author | Peter Maydell | 2019-03-26 11:27:20 +0100 |
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committer | Peter Maydell | 2019-03-26 11:27:20 +0100 |
commit | d37bfe142382fa8258531c47b4519387c77cd169 (patch) | |
tree | bc274d38638d0baa65fe9f75a00d39695d710394 | |
parent | Merge remote-tracking branch 'remotes/armbru/tags/pull-pflash-2019-03-26' int... (diff) | |
parent | target/riscv: Fix wrong expanding for c.fswsp (diff) | |
download | qemu-d37bfe142382fa8258531c47b4519387c77cd169.tar.gz qemu-d37bfe142382fa8258531c47b4519387c77cd169.tar.xz qemu-d37bfe142382fa8258531c47b4519387c77cd169.zip |
Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-4.0-rc1-v2' into staging
A second RISC-V Patch for 4.0.0-rc1
Sorry for sending two back-to-back pull requests. It looks like I
misunderstood Kito and there were actually two patches necessary to fix
the GCC test suite runs.
# gpg: Signature made Tue 26 Mar 2019 10:20:20 GMT
# gpg: using RSA key 00CE76D1834960DFCE886DF8EF4CA1502CCBAB41
# gpg: issuer "palmer@dabbelt.com"
# gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>" [unknown]
# gpg: aka "Palmer Dabbelt <palmer@sifive.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 00CE 76D1 8349 60DF CE88 6DF8 EF4C A150 2CCB AB41
* remotes/palmer/tags/riscv-for-master-4.0-rc1-v2:
target/riscv: Fix wrong expanding for c.fswsp
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r-- | target/riscv/insn_trans/trans_rvc.inc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/riscv/insn_trans/trans_rvc.inc.c b/target/riscv/insn_trans/trans_rvc.inc.c index 5819f53f90..ebcd977b2f 100644 --- a/target/riscv/insn_trans/trans_rvc.inc.c +++ b/target/riscv/insn_trans/trans_rvc.inc.c @@ -337,7 +337,7 @@ static bool trans_c_fswsp_sdsp(DisasContext *ctx, arg_c_fswsp_sdsp *a) { #ifdef TARGET_RISCV32 /* C.FSWSP */ - arg_fsw a_fsw = { .rs1 = a->rs2, .rs2 = 2, .imm = a->uimm_fswsp }; + arg_fsw a_fsw = { .rs1 = 2, .rs2 = a->rs2, .imm = a->uimm_fswsp }; return trans_fsw(ctx, &a_fsw); #else /* C.SDSP */ |