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| author | Andreas Färber | 2012-04-15 23:29:19 +0200 |
|---|---|---|
| committer | Andreas Färber | 2012-04-30 11:32:13 +0200 |
| commit | 0f71a7095db6bc055bc5bb520d85ea650cca8a33 (patch) | |
| tree | f7df5f75ee70431f270671936477b793f378c500 /Makefile.target | |
| parent | target-m68k: Add QOM CPU subclasses (diff) | |
| download | qemu-0f71a7095db6bc055bc5bb520d85ea650cca8a33.tar.gz qemu-0f71a7095db6bc055bc5bb520d85ea650cca8a33.tar.xz qemu-0f71a7095db6bc055bc5bb520d85ea650cca8a33.zip | |
target-mips: QOM'ify CPU
Embed CPUMIPSState as first member of QOM MIPSCPU.
Let CPUClass::reset() call cpu_state_reset() for now.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'Makefile.target')
| -rw-r--r-- | Makefile.target | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/Makefile.target b/Makefile.target index e735064be7..f7b2e7145a 100644 --- a/Makefile.target +++ b/Makefile.target @@ -98,6 +98,9 @@ libobj-$(TARGET_CRIS) += cpu.o libobj-$(TARGET_LM32) += cpu.o libobj-$(TARGET_M68K) += cpu.o libobj-$(TARGET_MICROBLAZE) += cpu.o +ifeq ($(TARGET_BASE_ARCH), mips) +libobj-y += cpu.o +endif libobj-$(TARGET_S390X) += cpu.o libobj-$(TARGET_SH4) += cpu.o ifeq ($(TARGET_BASE_ARCH), sparc) |