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author | Emilio G. Cota | 2017-07-16 21:13:52 +0200 |
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committer | Richard Henderson | 2017-10-24 22:53:42 +0200 |
commit | e82d5a2460b0e176128027651ff9b104e4bdf5cc (patch) | |
tree | 5e0cf9efe35adea7119254fdd5a4ff2df306d73e /accel | |
parent | target/sparc: check CF_PARALLEL instead of parallel_cpus (diff) | |
download | qemu-e82d5a2460b0e176128027651ff9b104e4bdf5cc.tar.gz qemu-e82d5a2460b0e176128027651ff9b104e4bdf5cc.tar.xz qemu-e82d5a2460b0e176128027651ff9b104e4bdf5cc.zip |
tcg: check CF_PARALLEL instead of parallel_cpus
Thereby decoupling the resulting translated code from the current state
of the system.
The tb->cflags field is not passed to tcg generation functions. So
we add a field to TCGContext, storing there a copy of tb->cflags.
Most architectures have <= 32 registers, which results in a 4-byte hole
in TCGContext. Use this hole for the new field.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'accel')
-rw-r--r-- | accel/tcg/translate-all.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 91fd6e444b..dcd47cd692 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1296,6 +1296,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu, tb->flags = flags; tb->cflags = cflags; tb->trace_vcpu_dstate = *cpu->trace_dstate; + tcg_ctx.tb_cflags = cflags; #ifdef CONFIG_PROFILER tcg_ctx.tb_count1++; /* includes aborted translations because of |