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| author | Ralf-Philipp Weinmann | 2016-03-04 12:30:22 +0100 |
|---|---|---|
| committer | Peter Maydell | 2016-03-04 12:30:22 +0100 |
| commit | ba63cf47a93041137a94e86b7d0cd87fc896949b (patch) | |
| tree | da8e1ea0ee497fea96ed2bf52ef5ca93285bc9f4 /blockdev.c | |
| parent | hw/intc/arm_gic.c: Implement GICv2 GICC_DIR (diff) | |
| download | qemu-ba63cf47a93041137a94e86b7d0cd87fc896949b.tar.gz qemu-ba63cf47a93041137a94e86b7d0cd87fc896949b.tar.xz qemu-ba63cf47a93041137a94e86b7d0cd87fc896949b.zip | |
target-arm: Only trap SRS from S-EL1 if specified mode is MON
Commit cbc0326b6fb9 caused SRS instructions executed from Secure
EL1 to trap to EL3 even if the specified mode was not monitor mode.
According to the ARMv8 Architecture reference manual [F6.1.203], ALL
of the following conditions need to be met for SRS to trap to EL3:
* It is executed at Secure PL1.
* The specified mode is monitor mode.
* EL3 is using AArch64.
Correct the condition governing the trap to EL3 to check the
specified mode.
Signed-off-by: Ralf-Philipp Weinmann <ralf+devel@comsecuris.com>
Message-id: 20160222224251.GA11654@beta.comsecuris.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: tweaked comment text to read 'specified mode'; edited
commit message]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'blockdev.c')
0 files changed, 0 insertions, 0 deletions