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author | Peter Maydell | 2022-02-07 17:54:30 +0100 |
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committer | Peter Maydell | 2022-02-08 11:56:28 +0100 |
commit | 3f37979bf5dae9de7fe23e2d48c53d2ba79afe79 (patch) | |
tree | 77f8874e08cf33a5c39060926d4707b2a999ec78 /hw/arm | |
parent | hw/arm: highbank: For EL3 guests, don't enable PSCI, start all cores (diff) | |
download | qemu-3f37979bf5dae9de7fe23e2d48c53d2ba79afe79.tar.gz qemu-3f37979bf5dae9de7fe23e2d48c53d2ba79afe79.tar.xz qemu-3f37979bf5dae9de7fe23e2d48c53d2ba79afe79.zip |
arm: tcg: Adhere to SMCCC 1.3 section 5.2
The SMCCC 1.3 spec section 5.2 says
The Unknown SMC Function Identifier is a sign-extended value of (-1)
that is returned in the R0, W0 or X0 registers. An implementation must
return this error code when it receives:
* An SMC or HVC call with an unknown Function Identifier
* An SMC or HVC call for a removed Function Identifier
* An SMC64/HVC64 call from AArch32 state
To comply with these statements, let's always return -1 when we encounter
an unknown HVC or SMC call.
[PMM:
This is a reinstatement of commit 9fcd15b9193e819b, previously
reverted in commit 4825eaae4fdd56fba0f; we can do this now that we
have arranged for all the affected board models to not enable the
PSCI emulation if they are running guest code at EL3. This avoids
the regressions that caused us to revert the change for 7.0.]
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Cédric Le Goater <clg@kaod.org>
Tested-by: Niek Linnenbank <nieklinnenbank@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm')
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