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author | Isaku Yamahata | 2009-10-30 13:21:08 +0100 |
---|---|---|
committer | Anthony Liguori | 2009-11-09 15:43:08 +0100 |
commit | 6e355d901baec118f0eb40ecd75a4278625f5d03 (patch) | |
tree | 91118ef8bbfae888a1700f9b3c7e877ae4cc36b2 /hw/eepro100.c | |
parent | pci_host: consolidate pci config address access. (diff) | |
download | qemu-6e355d901baec118f0eb40ecd75a4278625f5d03.tar.gz qemu-6e355d901baec118f0eb40ecd75a4278625f5d03.tar.xz qemu-6e355d901baec118f0eb40ecd75a4278625f5d03.zip |
pci: introduce pcibus_t to represent pci bus address/size instead of uint32_t
This patch is preliminary for 64 bit BAR support.
Introduce dedicated type, pcibus_t, to represent pci bus address/size
instead of uint32_t.
Later this type will be changed to uint64_t.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/eepro100.c')
-rw-r--r-- | hw/eepro100.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/eepro100.c b/hw/eepro100.c index 829731e161..55e7717a81 100644 --- a/hw/eepro100.c +++ b/hw/eepro100.c @@ -1384,7 +1384,7 @@ static void ioport_write4(void *opaque, uint32_t addr, uint32_t val) /* PCI EEPRO100 definitions */ static void pci_map(PCIDevice * pci_dev, int region_num, - uint32_t addr, uint32_t size, int type) + pcibus_t addr, pcibus_t size, int type) { EEPRO100State *s = DO_UPCAST(EEPRO100State, dev, pci_dev); @@ -1463,7 +1463,7 @@ static CPUReadMemoryFunc * const pci_mmio_read[] = { }; static void pci_mmio_map(PCIDevice * pci_dev, int region_num, - uint32_t addr, uint32_t size, int type) + pcibus_t addr, pcibus_t size, int type) { EEPRO100State *s = DO_UPCAST(EEPRO100State, dev, pci_dev); |