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| author | Wendy Liang | 2013-04-03 07:33:08 +0200 |
|---|---|---|
| committer | Peter Maydell | 2013-04-05 18:08:54 +0200 |
| commit | 32aea752f47f30c00878dcc323ac4debf0c9e645 (patch) | |
| tree | 191d8cfe86a4e12d9e45ce8967ddf74d10d249fb /hw/ide/isa.c | |
| parent | cadence_uart: Flush queued characters on reset (diff) | |
| download | qemu-32aea752f47f30c00878dcc323ac4debf0c9e645.tar.gz qemu-32aea752f47f30c00878dcc323ac4debf0c9e645.tar.xz qemu-32aea752f47f30c00878dcc323ac4debf0c9e645.zip | |
hw/nand.c: Fix nand erase operation
Usually, nand erase operation has only 2 or 3 address cycles.
We need to mask s->addr to zero unset stale high-order bytes in the nand address
before using it as the erase address.
This fixes the NAND erase operation in Linux.
[PC: Generalised to work for any number of address cycles rather than just 3]
Signed-off-by: Wendy Liang <jliang@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 1364967188-26711-1-git-send-email-peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/ide/isa.c')
0 files changed, 0 insertions, 0 deletions