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| author | Peter Xu | 2016-07-14 07:56:19 +0200 |
|---|---|---|
| committer | Michael S. Tsirkin | 2016-07-20 18:30:27 +0200 |
| commit | 80de52ba87d44bf63157900b8dd5ccd5bd795fd4 (patch) | |
| tree | 4211567a7821626cfac75454671889c5646f9fca /hw/intc/puv3_intc.c | |
| parent | intel_iommu: define interrupt remap table addr register (diff) | |
| download | qemu-80de52ba87d44bf63157900b8dd5ccd5bd795fd4.tar.gz qemu-80de52ba87d44bf63157900b8dd5ccd5bd795fd4.tar.xz qemu-80de52ba87d44bf63157900b8dd5ccd5bd795fd4.zip | |
intel_iommu: handle interrupt remap enable
Handle writting to IRE bit in global command register.
Signed-off-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/intc/puv3_intc.c')
0 files changed, 0 insertions, 0 deletions