Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* Record-replay lockstep execution, log dumper and fixes (Alex, Pavel)
* SCSI fix to pass maximum transfer size (Daniel Barboza)
* chardev fixes and improved iothread support (Daniel Berrangé, Peter)
* checkpatch tweak (Eric)
* make help tweak (Marc-André)
* make more PCI NICs available with -net or -nic (myself)
* change default q35 NIC to e1000e (myself)
* SCSI support for NDOB bit (myself)
* membarrier system call support (myself)
* SuperIO refactoring (Philippe)
* miscellaneous cleanups and fixes (Thomas)

# gpg: Signature made Mon 12 Mar 2018 16:10:52 GMT
# gpg:                using RSA key BFFBD25F78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>"
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>"
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream: (69 commits)
  tcg: fix cpu_io_recompile
  replay: update documentation
  replay: save vmstate of the asynchronous events
  replay: don't process async events when warping the clock
  scripts/replay-dump.py: replay log dumper
  replay: avoid recursive call of checkpoints
  replay: check return values of fwrite
  replay: push replay_mutex_lock up the call tree
  replay: don't destroy mutex at exit
  replay: make locking visible outside replay code
  replay/replay-internal.c: track holding of replay_lock
  replay/replay.c: bump REPLAY_VERSION again
  replay: save prior value of the host clock
  replay: added replay log format description
  replay: fix save/load vm for non-empty queue
  replay: fixed replay_enable_events
  replay: fix processing async events
  cpu-exec: fix exception_index handling
  hw/i386/pc: Factor out the superio code
  hw/alpha/dp264: Use the TYPE_SMC37C669_SUPERIO
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

# Conflicts:
#	default-configs/i386-softmmu.mak
#	default-configs/x86_64-softmmu.mak

1 files changed, 214 insertions, 0 deletions

diff --git a/hw/isa/isa-superio.c b/hw/isa/isa-superio.c
new file mode 100644
index 0000000000..b95608a003
--- /dev/null
+++ b/hw/isa/isa-superio.c
@@ -0,0 +1,214 @@
+/*
+ * Generic ISA Super I/O
+ *
+ * Copyright (c) 2010-2012 Herve Poussineau
+ * Copyright (c) 2011-2012 Andreas Färber
+ * Copyright (c) 2018 Philippe Mathieu-Daudé
+ *
+ * This code is licensed under the GNU GPLv2 and later.
+ * See the COPYING file in the top-level directory.
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+#include "qemu/osdep.h"
+#include "qemu/error-report.h"
+#include "qapi/error.h"
+#include "sysemu/sysemu.h"
+#include "sysemu/block-backend.h"
+#include "sysemu/blockdev.h"
+#include "chardev/char.h"
+#include "hw/isa/superio.h"
+#include "hw/input/i8042.h"
+#include "hw/char/serial.h"
+#include "trace.h"
+
+static void isa_superio_realize(DeviceState *dev, Error **errp)
+{
+    ISASuperIODevice *sio = ISA_SUPERIO(dev);
+    ISASuperIOClass *k = ISA_SUPERIO_GET_CLASS(sio);
+    ISABus *bus = isa_bus_from_device(ISA_DEVICE(dev));
+    ISADevice *isa;
+    DeviceState *d;
+    Chardev *chr;
+    DriveInfo *drive;
+    char *name;
+    int i;
+
+    /* Parallel port */
+    for (i = 0; i < k->parallel.count; i++) {
+        if (i >= ARRAY_SIZE(sio->parallel)) {
+            warn_report("superio: ignoring %td parallel controllers",
+                        k->parallel.count - ARRAY_SIZE(sio->parallel));
+            break;
+        }
+        if (!k->parallel.is_enabled || k->parallel.is_enabled(sio, i)) {
+            /* FIXME use a qdev chardev prop instead of parallel_hds[] */
+            chr = parallel_hds[i];
+            if (chr == NULL || chr->be) {
+                name = g_strdup_printf("discarding-parallel%d", i);
+                chr = qemu_chr_new(name, "null");
+            } else {
+                name = g_strdup_printf("parallel%d", i);
+            }
+            isa = isa_create(bus, "isa-parallel");
+            d = DEVICE(isa);
+            qdev_prop_set_uint32(d, "index", i);
+            if (k->parallel.get_iobase) {
+                qdev_prop_set_uint32(d, "iobase",
+                                     k->parallel.get_iobase(sio, i));
+            }
+            if (k->parallel.get_irq) {
+                qdev_prop_set_uint32(d, "irq", k->parallel.get_irq(sio, i));
+            }
+            qdev_prop_set_chr(d, "chardev", chr);
+            qdev_init_nofail(d);
+            sio->parallel[i] = isa;
+            trace_superio_create_parallel(i,
+                                          k->parallel.get_iobase ?
+                                          k->parallel.get_iobase(sio, i) : -1,
+                                          k->parallel.get_irq ?
+                                          k->parallel.get_irq(sio, i) : -1);
+            object_property_add_child(OBJECT(dev), name,
+                                      OBJECT(sio->parallel[i]), NULL);
+            g_free(name);
+        }
+    }
+
+    /* Serial */
+    for (i = 0; i < k->serial.count; i++) {
+        if (i >= ARRAY_SIZE(sio->serial)) {
+            warn_report("superio: ignoring %td serial controllers",
+                        k->serial.count - ARRAY_SIZE(sio->serial));
+            break;
+        }
+        if (!k->serial.is_enabled || k->serial.is_enabled(sio, i)) {
+            /* FIXME use a qdev chardev prop instead of serial_hds[] */
+            chr = serial_hds[i];
+            if (chr == NULL || chr->be) {
+                name = g_strdup_printf("discarding-serial%d", i);
+                chr = qemu_chr_new(name, "null");
+            } else {
+                name = g_strdup_printf("serial%d", i);
+            }
+            isa = isa_create(bus, TYPE_ISA_SERIAL);
+            d = DEVICE(isa);
+            qdev_prop_set_uint32(d, "index", i);
+            if (k->serial.get_iobase) {
+                qdev_prop_set_uint32(d, "iobase",
+                                     k->serial.get_iobase(sio, i));
+            }
+            if (k->serial.get_irq) {
+                qdev_prop_set_uint32(d, "irq", k->serial.get_irq(sio, i));
+            }
+            qdev_prop_set_chr(d, "chardev", chr);
+            qdev_init_nofail(d);
+            sio->serial[i] = isa;
+            trace_superio_create_serial(i,
+                                        k->serial.get_iobase ?
+                                        k->serial.get_iobase(sio, i) : -1,
+                                        k->serial.get_irq ?
+                                        k->serial.get_irq(sio, i) : -1);
+            object_property_add_child(OBJECT(dev), name,
+                                      OBJECT(sio->serial[0]), NULL);
+            g_free(name);
+        }
+    }
+
+    /* Floppy disc */
+    if (!k->floppy.is_enabled || k->floppy.is_enabled(sio, 0)) {
+        isa = isa_create(bus, "isa-fdc");
+        d = DEVICE(isa);
+        if (k->floppy.get_iobase) {
+            qdev_prop_set_uint32(d, "iobase", k->floppy.get_iobase(sio, 0));
+        }
+        if (k->floppy.get_irq) {
+            qdev_prop_set_uint32(d, "irq", k->floppy.get_irq(sio, 0));
+        }
+        /* FIXME use a qdev drive property instead of drive_get() */
+        drive = drive_get(IF_FLOPPY, 0, 0);
+        if (drive != NULL) {
+            qdev_prop_set_drive(d, "driveA", blk_by_legacy_dinfo(drive),
+                                &error_fatal);
+        }
+        /* FIXME use a qdev drive property instead of drive_get() */
+        drive = drive_get(IF_FLOPPY, 0, 1);
+        if (drive != NULL) {
+            qdev_prop_set_drive(d, "driveB", blk_by_legacy_dinfo(drive),
+                                &error_fatal);
+        }
+        qdev_init_nofail(d);
+        sio->floppy = isa;
+        trace_superio_create_floppy(0,
+                                    k->floppy.get_iobase ?
+                                    k->floppy.get_iobase(sio, 0) : -1,
+                                    k->floppy.get_irq ?
+                                    k->floppy.get_irq(sio, 0) : -1);
+    }
+
+    /* Keyboard, mouse */
+    sio->kbc = isa_create_simple(bus, TYPE_I8042);
+
+    /* IDE */
+    if (k->ide.count && (!k->ide.is_enabled || k->ide.is_enabled(sio, 0))) {
+        isa = isa_create(bus, "isa-ide");
+        d = DEVICE(isa);
+        if (k->ide.get_iobase) {
+            qdev_prop_set_uint32(d, "iobase", k->ide.get_iobase(sio, 0));
+        }
+        if (k->ide.get_iobase) {
+            qdev_prop_set_uint32(d, "iobase2", k->ide.get_iobase(sio, 1));
+        }
+        if (k->ide.get_irq) {
+            qdev_prop_set_uint32(d, "irq", k->ide.get_irq(sio, 0));
+        }
+        qdev_init_nofail(d);
+        sio->ide = isa;
+        trace_superio_create_ide(0,
+                                 k->ide.get_iobase ?
+                                 k->ide.get_iobase(sio, 0) : -1,
+                                 k->ide.get_irq ?
+                                 k->ide.get_irq(sio, 0) : -1);
+    }
+}
+
+static void isa_superio_class_init(ObjectClass *oc, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(oc);
+
+    dc->realize = isa_superio_realize;
+    /* Reason: Uses parallel_hds[0] in realize(), so it can't be used twice */
+    dc->user_creatable = false;
+}
+
+static const TypeInfo isa_superio_type_info = {
+    .name = TYPE_ISA_SUPERIO,
+    .parent = TYPE_ISA_DEVICE,
+    .abstract = true,
+    .class_size = sizeof(ISASuperIOClass),
+    .class_init = isa_superio_class_init,
+};
+
+/* SMS FDC37M817 Super I/O */
+static void fdc37m81x_class_init(ObjectClass *klass, void *data)
+{
+    ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass);
+
+    sc->serial.count = 2; /* NS16C550A */
+    sc->parallel.count = 1;
+    sc->floppy.count = 1; /* SMSC 82077AA Compatible */
+    sc->ide.count = 0;
+}
+
+static const TypeInfo fdc37m81x_type_info = {
+    .name          = TYPE_FDC37M81X_SUPERIO,
+    .parent        = TYPE_ISA_SUPERIO,
+    .instance_size = sizeof(ISASuperIODevice),
+    .class_init    = fdc37m81x_class_init,
+};
+
+static void isa_superio_register_types(void)
+{
+    type_register_static(&isa_superio_type_info);
+    type_register_static(&fdc37m81x_type_info);
+}
+
+type_init(isa_superio_register_types)