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author | Peter Maydell | 2021-05-03 13:05:11 +0200 |
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committer | Peter Maydell | 2021-05-03 13:05:12 +0200 |
commit | e93d8bcf9dbd5b8dd3b9ddbb1ece6a37e608f300 (patch) | |
tree | 2884b98954f0eb8572a467550fe4d9b43c1212d1 /hw/isa/piix4.c | |
parent | Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-hex-20210502' into... (diff) | |
parent | gitlab-ci: Add KVM mips64el cross-build jobs (diff) | |
download | qemu-e93d8bcf9dbd5b8dd3b9ddbb1ece6a37e608f300.tar.gz qemu-e93d8bcf9dbd5b8dd3b9ddbb1ece6a37e608f300.tar.xz qemu-e93d8bcf9dbd5b8dd3b9ddbb1ece6a37e608f300.zip |
Merge remote-tracking branch 'remotes/philmd/tags/mips-20210502' into staging
MIPS patches queue
- Fix CACHEE opcode
- Add missing CP0 checks to nanoMIPS RDPGPR / WRPGPR opcodes
- Remove isa_get_irq() call in PIIX4 south bridge
- Add various missing fields to the MIPS CPU migration vmstate
- Lot of code moved around to allow TCG or KVM only builds
- Restrict non-virtualized machines to TCG
- Add KVM mips64el cross-build jobs to gitlab-ci
# gpg: Signature made Sun 02 May 2021 15:56:51 BST
# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* remotes/philmd/tags/mips-20210502: (36 commits)
gitlab-ci: Add KVM mips64el cross-build jobs
hw/mips: Restrict non-virtualized machines to TCG
target/mips: Move TCG source files under tcg/ sub directory
target/mips: Move CP0 helpers to sysemu/cp0.c
target/mips: Move exception management code to exception.c
target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.c
target/mips: Move helper_cache() to tcg/sysemu/special_helper.c
target/mips: Move Special opcodes to tcg/sysemu/special_helper.c
target/mips: Restrict CPUMIPSTLBContext::map_address() handlers scope
target/mips: Move tlb_helper.c to tcg/sysemu/
target/mips: Restrict mmu_init() to TCG
target/mips: Move sysemu TCG-specific code to tcg/sysemu/ subfolder
target/mips: Restrict cpu_mips_get_random() / update_pagemask() to TCG
target/mips: Move physical addressing code to sysemu/physaddr.c
target/mips: Move sysemu specific files under sysemu/ subfolder
target/mips: Move cpu_signal_handler definition around
target/mips: Add simple user-mode mips_cpu_tlb_fill()
target/mips: Add simple user-mode mips_cpu_do_interrupt()
target/mips: Introduce tcg-internal.h for TCG specific declarations
meson: Introduce meson_user_arch source set for arch-specific user-mode
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/isa/piix4.c')
-rw-r--r-- | hw/isa/piix4.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index b3b6a4378a..5ae3b4984d 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -268,8 +268,9 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus) pci_create_simple(pci_bus, devfn + 2, "piix4-usb-uhci"); if (smbus) { *smbus = piix4_pm_init(pci_bus, devfn + 3, 0x1100, - isa_get_irq(NULL, 9), NULL, 0, NULL); - } + qdev_get_gpio_in_named(dev, "isa", 9), + NULL, 0, NULL); + } return dev; } |