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authorPeter Maydell2020-12-14 19:53:30 +0100
committerPeter Maydell2020-12-14 19:53:30 +0100
commitaa14de086675280206dbc1849da6f85b75f62f1b (patch)
tree39640303cb223ea8e72474b27d375cdb14131609 /hw/mips/boston.c
parentMerge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.0-20201214' in... (diff)
parenttarget/mips: Use FloatRoundMode enum for FCR31 modes conversion (diff)
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Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-20201213' into staging
MIPS patches queue . Allow executing MSA instructions on Loongson-3A4000 . Update Huacai Chen email address . Various cleanups: - unused headers removal - use definitions instead of magic values - remove dead code - avoid calling unused code . Various code movements CI jobs results: https://gitlab.com/philmd/qemu/-/pipelines/229120169 https://cirrus-ci.com/build/4857731557359616 # gpg: Signature made Sun 13 Dec 2020 20:18:52 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/mips-20201213: (26 commits) target/mips: Use FloatRoundMode enum for FCR31 modes conversion target/mips: Remove unused headers from fpu_helper.c target/mips: Inline cpu_mips_realize_env() in mips_cpu_realizefn() target/mips: Move cpu definitions, reset() and realize() to cpu.c target/mips: Move mips_cpu_add_definition() from helper.c to cpu.c target/mips: Extract cpu_supports*/cpu_set* translate.c hw/mips/malta: Rewrite CP0_MVPConf0 access using deposit() hw/mips/malta: Do not initialize MT registers if MT ASE absent target/mips: Do not initialize MT registers if MT ASE absent target/mips: Introduce ase_mt_available() helper target/mips: Remove mips_def_t unused argument from mvp_init() target/mips: Remove unused headers from op_helper.c target/mips: Remove unused headers from translate.c hw/mips: Move address translation helpers to target/mips/ target/mips: Introduce cpu_supports_isa() taking CPUMIPSState argument target/mips: Rename cpu_supports_FEAT() as cpu_type_supports_FEAT() target/mips: Explicit Release 6 MMU types target/mips: Allow executing MSA instructions on Loongson-3A4000 target/mips: Also display exception names in user-mode target/mips: Remove unused headers from cp0_helper.c ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/mips/boston.c')
-rw-r--r--hw/mips/boston.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/hw/mips/boston.c b/hw/mips/boston.c
index 3d40867dc4..c3b94c68e1 100644
--- a/hw/mips/boston.c
+++ b/hw/mips/boston.c
@@ -28,7 +28,6 @@
#include "hw/loader.h"
#include "hw/loader-fit.h"
#include "hw/mips/cps.h"
-#include "hw/mips/cpudevs.h"
#include "hw/pci-host/xilinx-pcie.h"
#include "hw/qdev-clock.h"
#include "hw/qdev-properties.h"
@@ -459,12 +458,12 @@ static void boston_mach_init(MachineState *machine)
s = BOSTON(dev);
s->mach = machine;
- if (!cpu_supports_cps_smp(machine->cpu_type)) {
+ if (!cpu_type_supports_cps_smp(machine->cpu_type)) {
error_report("Boston requires CPUs which support CPS");
exit(1);
}
- is_64b = cpu_supports_isa(machine->cpu_type, ISA_MIPS64);
+ is_64b = cpu_type_supports_isa(machine->cpu_type, ISA_MIPS64);
object_initialize_child(OBJECT(machine), "cps", &s->cps, TYPE_MIPS_CPS);
object_property_set_str(OBJECT(&s->cps), "cpu-type", machine->cpu_type,