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| author | Andre Przywara | 2009-08-19 15:42:42 +0200 |
|---|---|---|
| committer | Anthony Liguori | 2009-08-28 02:33:15 +0200 |
| commit | 400281af34e5ee6aa9f5496b53d8f82c6fef9319 (patch) | |
| tree | 44de8772409c8f19479ed5499585f5b6f2301b90 /hw/mst_fpga.c | |
| parent | push CPUID level to 4 to allow Intel multicore decoding (diff) | |
| download | qemu-400281af34e5ee6aa9f5496b53d8f82c6fef9319.tar.gz qemu-400281af34e5ee6aa9f5496b53d8f82c6fef9319.tar.xz qemu-400281af34e5ee6aa9f5496b53d8f82c6fef9319.zip | |
set CPUID bits to present cores and threads topology
Controlled by the enhanced -smp option set the CPUID bits to present the
guest the desired topology. This is vendor specific, but (with the exception
of the CMP_LEGACY bit) not conflicting, so we set all bits everytime.
There is no real multithreading support for AMD CPUs, so report cores
instead.
Signed-off-by: Andre Przywara <andre.przywara@amd.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/mst_fpga.c')
0 files changed, 0 insertions, 0 deletions