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author | Rob Herring | 2011-12-29 07:19:54 +0100 |
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committer | Peter Maydell | 2012-01-04 14:41:42 +0100 |
commit | b2123a48566ab0636b78dda6b9c37c54bff69e6b (patch) | |
tree | fd19ff5b26f480bc9a21fc6bf6a046e1af15390b /hw/omap1.c | |
parent | arm: add dummy gic security registers (diff) | |
download | qemu-b2123a48566ab0636b78dda6b9c37c54bff69e6b.tar.gz qemu-b2123a48566ab0636b78dda6b9c37c54bff69e6b.tar.xz qemu-b2123a48566ab0636b78dda6b9c37c54bff69e6b.zip |
add L2x0/PL310 cache controller device
This is just a dummy device for ARM L2 cache controllers, based on the
pl310. The cache type parameter can be defined by a property value
and has a meaningful default.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
[Peter Maydell: removed stray blank line at end]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/omap1.c')
0 files changed, 0 insertions, 0 deletions