Merge remote-tracking branch 'bonzini/hw-dirs' into staging

# By Paolo Bonzini
# Via Paolo Bonzini
* bonzini/hw-dirs: (35 commits)
  hw: move private headers to hw/ subdirectories.
  MAINTAINERS: update for source code movement
  hw: move last file to hw/arm/
  hw: move hw/kvm/ to hw/i386/kvm
  hw: move ARM CPU cores to hw/cpu/, configure with default-configs/
  hw: move other devices to hw/misc/, configure with default-configs/
  hw: move NVRAM interfaces to hw/nvram/, configure with default-configs/
  hw: move GPIO interfaces to hw/gpio/, configure with default-configs/
  hw: move interrupt controllers to hw/intc/, configure with default-configs/
  hw: move DMA controllers to hw/dma/, configure with default-configs/
  hw: move VFIO and ivshmem to hw/misc/
  hw: move PCI bridges to hw/pci-* or hw/ARCH
  hw: move SD/MMC devices to hw/sd/, configure with default-configs/
  hw: move timer devices to hw/timer/, configure with default-configs/
  hw: move ISA bridges and devices to hw/isa/, configure with default-configs/
  hw: move char devices to hw/char/, configure via default-configs/
  hw: move more files to hw/xen/
  hw: move SCSI controllers to hw/scsi/, configure via default-configs/
  hw: move SSI controllers to hw/ssi/, configure via default-configs/
  hw: move I2C controllers to hw/i2c/, configure via default-configs/
  ...

Message-id: 1365442249-18259-1-git-send-email-pbonzini@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>

1 files changed, 0 insertions, 48 deletions

diff --git a/hw/pci/shpc.h b/hw/pci/shpc.h
deleted file mode 100644
index 467911a558..0000000000
--- a/hw/pci/shpc.h
+++ /dev/null
@@ -1,48 +0,0 @@
-#ifndef SHPC_H
-#define SHPC_H
-
-#include "qemu-common.h"
-#include "exec/memory.h"
-#include "migration/vmstate.h"
-
-struct SHPCDevice {
-    /* Capability offset in device's config space */
-    int cap;
-
-    /* # of hot-pluggable slots */
-    int nslots;
-
-    /* SHPC WRS: working register set */
-    uint8_t *config;
-
-    /* Used to enable checks on load. Note that writable bits are
-     * never checked even if set in cmask. */
-    uint8_t *cmask;
-
-    /* Used to implement R/W bytes */
-    uint8_t *wmask;
-
-    /* Used to implement RW1C(Write 1 to Clear) bytes */
-    uint8_t *w1cmask;
-
-    /* MMIO for the SHPC BAR */
-    MemoryRegion mmio;
-
-    /* Bus controlled by this SHPC */
-    PCIBus *sec_bus;
-
-    /* MSI already requested for this event */
-    int msi_requested;
-};
-
-void shpc_reset(PCIDevice *d);
-int shpc_bar_size(PCIDevice *dev);
-int shpc_init(PCIDevice *dev, PCIBus *sec_bus, MemoryRegion *bar, unsigned off);
-void shpc_cleanup(PCIDevice *dev, MemoryRegion *bar);
-void shpc_cap_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int len);
-
-extern VMStateInfo shpc_vmstate_info;
-#define SHPC_VMSTATE(_field, _type) \
-    VMSTATE_BUFFER_UNSAFE_INFO(_field, _type, 0, shpc_vmstate_info, 0)
-
-#endif