summaryrefslogtreecommitdiffstats
path: root/hw/pl011.c
diff options
context:
space:
mode:
authorAndreas Färber2013-01-10 21:52:28 +0100
committerAndreas Färber2013-01-10 21:52:28 +0100
commit63e3555e80c31776285accbb4d0c14ae91c457dc (patch)
tree89907c82724d6519c8bbad7acc15c0198c6f902f /hw/pl011.c
parentprep: Use pc87312 device instead of collection of random ISA devices (diff)
parentMerge remote-tracking branch 'kraxel/build.1' into staging (diff)
downloadqemu-63e3555e80c31776285accbb4d0c14ae91c457dc.tar.gz
qemu-63e3555e80c31776285accbb4d0c14ae91c457dc.tar.xz
qemu-63e3555e80c31776285accbb4d0c14ae91c457dc.zip
Merge branch 'master' of git://git.qemu.org/qemu into prep-up
Conflicts: hw/Makefile.objs hw/ppc_prep.c Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Diffstat (limited to 'hw/pl011.c')
-rw-r--r--hw/pl011.c17
1 files changed, 10 insertions, 7 deletions
diff --git a/hw/pl011.c b/hw/pl011.c
index 3245702df0..35835f36c0 100644
--- a/hw/pl011.c
+++ b/hw/pl011.c
@@ -8,7 +8,7 @@
*/
#include "sysbus.h"
-#include "qemu-char.h"
+#include "char/char.h"
typedef struct {
SysBusDevice busdev;
@@ -54,7 +54,7 @@ static void pl011_update(pl011_state *s)
qemu_set_irq(s->irq, flags != 0);
}
-static uint64_t pl011_read(void *opaque, target_phys_addr_t offset,
+static uint64_t pl011_read(void *opaque, hwaddr offset,
unsigned size)
{
pl011_state *s = (pl011_state *)opaque;
@@ -107,7 +107,8 @@ static uint64_t pl011_read(void *opaque, target_phys_addr_t offset,
case 18: /* UARTDMACR */
return s->dmacr;
default:
- hw_error("pl011_read: Bad offset %x\n", (int)offset);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "pl011_read: Bad offset %x\n", (int)offset);
return 0;
}
}
@@ -126,7 +127,7 @@ static void pl011_set_read_trigger(pl011_state *s)
s->read_trigger = 1;
}
-static void pl011_write(void *opaque, target_phys_addr_t offset,
+static void pl011_write(void *opaque, hwaddr offset,
uint64_t value, unsigned size)
{
pl011_state *s = (pl011_state *)opaque;
@@ -178,11 +179,13 @@ static void pl011_write(void *opaque, target_phys_addr_t offset,
break;
case 18: /* UARTDMACR */
s->dmacr = value;
- if (value & 3)
- hw_error("PL011: DMA not implemented\n");
+ if (value & 3) {
+ qemu_log_mask(LOG_UNIMP, "pl011: DMA not implemented\n");
+ }
break;
default:
- hw_error("pl011_write: Bad offset %x\n", (int)offset);
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "pl011_write: Bad offset %x\n", (int)offset);
}
}