diff options
| author | Michael S. Tsirkin | 2009-11-25 11:00:10 +0100 |
|---|---|---|
| committer | Michael S. Tsirkin | 2009-12-01 17:00:00 +0100 |
| commit | 1f944c661a821774e7b8cfbf5560a238795f2a60 (patch) | |
| tree | 5665679277dac50aaa9eaedf025a1ca954ab38fc /hw/pl181.c | |
| parent | msix: fix mask bit state after reset (diff) | |
| download | qemu-1f944c661a821774e7b8cfbf5560a238795f2a60.tar.gz qemu-1f944c661a821774e7b8cfbf5560a238795f2a60.tar.xz qemu-1f944c661a821774e7b8cfbf5560a238795f2a60.zip | |
msix: fix reset value for enable bit
On reset, we currently clear all bits in msix control register *except*
enable bit. This is wrong: the spec says we should clear writeable
bits: function mask and enable bit.
Correct this.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/pl181.c')
0 files changed, 0 insertions, 0 deletions