diff options
| author | Anthony Liguori | 2012-03-14 22:47:49 +0100 |
|---|---|---|
| committer | Anthony Liguori | 2012-03-14 22:47:49 +0100 |
| commit | aea6ff7fa07b046fb9f43d6262d6e34b77e8437e (patch) | |
| tree | dd3043d1742273a95fa7fc5e99b8d5ffe0c710e5 /hw/ppc4xx_devs.c | |
| parent | vnc: Limit r/w access to size of allocated memory (diff) | |
| parent | qom: Introduce CPU class (diff) | |
| download | qemu-aea6ff7fa07b046fb9f43d6262d6e34b77e8437e.tar.gz qemu-aea6ff7fa07b046fb9f43d6262d6e34b77e8437e.tar.xz qemu-aea6ff7fa07b046fb9f43d6262d6e34b77e8437e.zip | |
Merge remote-tracking branch 'afaerber/qom-cpu.v5' into staging
* afaerber/qom-cpu.v5: (43 commits)
qom: Introduce CPU class
Rename CPUState -> CPUArchState
xtensa hw/: Don't use CPUState
sparc hw/: Don't use CPUState
sh4 hw/: Don't use CPUState
s390x hw/: Don't use CPUState
ppc hw/: Don't use CPUState
mips hw/: Don't use CPUState
microblaze hw/: Don't use CPUState
m68k hw/: Don't use CPUState
lm32 hw/: Don't use CPUState
i386 hw/: Don't use CPUState
cris hw/: Don't use CPUState
arm hw/: Don't use CPUState
alpha hw/: Don't use CPUState
xtensa-semi: Don't use CPUState
m68k-semi: Don't use CPUState
arm-semi: Don't use CPUState
target-xtensa: Don't overuse CPUState
target-unicore32: Don't overuse CPUState
...
Diffstat (limited to 'hw/ppc4xx_devs.c')
| -rw-r--r-- | hw/ppc4xx_devs.c | 17 |
1 files changed, 12 insertions, 5 deletions
diff --git a/hw/ppc4xx_devs.c b/hw/ppc4xx_devs.c index 26040ac3ad..00e36f4109 100644 --- a/hw/ppc4xx_devs.c +++ b/hw/ppc4xx_devs.c @@ -38,13 +38,20 @@ # define LOG_UIC(...) do { } while (0) #endif +static void ppc4xx_reset(void *opaque) +{ + CPUPPCState *env = opaque; + + cpu_state_reset(env); +} + /*****************************************************************************/ /* Generic PowerPC 4xx processor instantiation */ -CPUState *ppc4xx_init (const char *cpu_model, +CPUPPCState *ppc4xx_init (const char *cpu_model, clk_setup_t *cpu_clk, clk_setup_t *tb_clk, uint32_t sysclk) { - CPUState *env; + CPUPPCState *env; /* init CPUs */ env = cpu_init(cpu_model); @@ -60,7 +67,7 @@ CPUState *ppc4xx_init (const char *cpu_model, tb_clk->opaque = env; ppc_dcr_init(env, NULL, NULL); /* Register qemu callbacks */ - qemu_register_reset((QEMUResetHandler*)&cpu_reset, env); + qemu_register_reset(ppc4xx_reset, env); return env; } @@ -288,7 +295,7 @@ static void ppcuic_reset (void *opaque) } } -qemu_irq *ppcuic_init (CPUState *env, qemu_irq *irqs, +qemu_irq *ppcuic_init (CPUPPCState *env, qemu_irq *irqs, uint32_t dcr_base, int has_ssr, int has_vr) { ppcuic_t *uic; @@ -634,7 +641,7 @@ static void sdram_reset (void *opaque) sdram->cfg = 0x00800000; } -void ppc4xx_sdram_init (CPUState *env, qemu_irq irq, int nbanks, +void ppc4xx_sdram_init (CPUPPCState *env, qemu_irq irq, int nbanks, MemoryRegion *ram_memories, target_phys_addr_t *ram_bases, target_phys_addr_t *ram_sizes, |