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| author | Aurelien Jarno | 2009-10-17 14:17:47 +0200 |
|---|---|---|
| committer | Aurelien Jarno | 2009-12-01 01:06:15 +0100 |
| commit | afa05235a5860e7e2153b428294bd44569d4039b (patch) | |
| tree | c14d786d67390068c87e82ddf3e82a821f05579b /hw/sh_pci.c | |
| parent | target-mips: use physical address in lladdr (diff) | |
| download | qemu-afa05235a5860e7e2153b428294bd44569d4039b.tar.gz qemu-afa05235a5860e7e2153b428294bd44569d4039b.tar.xz qemu-afa05235a5860e7e2153b428294bd44569d4039b.zip | |
tcg: initial mips support
Based on a patch from Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org>
A few words about design choices:
* Two registers, at and t0, are reserved for TCG internal use. They are
useful for bswap and 64-bit ops.
* Most ops supports a constant argument with value 0, which is actually
mapped to the zero register.
* While the at register is available for constant loading, ops only
support a limited range of constants. TCG does a better job doing the
register allocation and constant loading by itself. There are plenty of
registers available anyway.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'hw/sh_pci.c')
0 files changed, 0 insertions, 0 deletions