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| author | Andreas Färber | 2013-01-10 21:52:28 +0100 |
|---|---|---|
| committer | Andreas Färber | 2013-01-10 21:52:28 +0100 |
| commit | 63e3555e80c31776285accbb4d0c14ae91c457dc (patch) | |
| tree | 89907c82724d6519c8bbad7acc15c0198c6f902f /hw/smc91c111.c | |
| parent | prep: Use pc87312 device instead of collection of random ISA devices (diff) | |
| parent | Merge remote-tracking branch 'kraxel/build.1' into staging (diff) | |
| download | qemu-63e3555e80c31776285accbb4d0c14ae91c457dc.tar.gz qemu-63e3555e80c31776285accbb4d0c14ae91c457dc.tar.xz qemu-63e3555e80c31776285accbb4d0c14ae91c457dc.zip | |
Merge branch 'master' of git://git.qemu.org/qemu into prep-up
Conflicts:
hw/Makefile.objs
hw/ppc_prep.c
Signed-off-by: Andreas Färber <andreas.faerber@web.de>
Diffstat (limited to 'hw/smc91c111.c')
| -rw-r--r-- | hw/smc91c111.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/hw/smc91c111.c b/hw/smc91c111.c index d6ef302c6d..2161b4af7a 100644 --- a/hw/smc91c111.c +++ b/hw/smc91c111.c @@ -8,7 +8,7 @@ */ #include "sysbus.h" -#include "net.h" +#include "net/net.h" #include "devices.h" /* For crc32 */ #include <zlib.h> @@ -276,7 +276,7 @@ static void smc91c111_reset(DeviceState *dev) #define SET_LOW(name, val) s->name = (s->name & 0xff00) | val #define SET_HIGH(name, val) s->name = (s->name & 0xff) | (val << 8) -static void smc91c111_writeb(void *opaque, target_phys_addr_t offset, +static void smc91c111_writeb(void *opaque, hwaddr offset, uint32_t value) { smc91c111_state *s = (smc91c111_state *)opaque; @@ -451,7 +451,7 @@ static void smc91c111_writeb(void *opaque, target_phys_addr_t offset, hw_error("smc91c111_write: Bad reg %d:%x\n", s->bank, (int)offset); } -static uint32_t smc91c111_readb(void *opaque, target_phys_addr_t offset) +static uint32_t smc91c111_readb(void *opaque, hwaddr offset) { smc91c111_state *s = (smc91c111_state *)opaque; @@ -595,14 +595,14 @@ static uint32_t smc91c111_readb(void *opaque, target_phys_addr_t offset) return 0; } -static void smc91c111_writew(void *opaque, target_phys_addr_t offset, +static void smc91c111_writew(void *opaque, hwaddr offset, uint32_t value) { smc91c111_writeb(opaque, offset, value & 0xff); smc91c111_writeb(opaque, offset + 1, value >> 8); } -static void smc91c111_writel(void *opaque, target_phys_addr_t offset, +static void smc91c111_writel(void *opaque, hwaddr offset, uint32_t value) { /* 32-bit writes to offset 0xc only actually write to the bank select @@ -612,7 +612,7 @@ static void smc91c111_writel(void *opaque, target_phys_addr_t offset, smc91c111_writew(opaque, offset + 2, value >> 16); } -static uint32_t smc91c111_readw(void *opaque, target_phys_addr_t offset) +static uint32_t smc91c111_readw(void *opaque, hwaddr offset) { uint32_t val; val = smc91c111_readb(opaque, offset); @@ -620,7 +620,7 @@ static uint32_t smc91c111_readw(void *opaque, target_phys_addr_t offset) return val; } -static uint32_t smc91c111_readl(void *opaque, target_phys_addr_t offset) +static uint32_t smc91c111_readl(void *opaque, hwaddr offset) { uint32_t val; val = smc91c111_readw(opaque, offset); |