summaryrefslogtreecommitdiffstats
path: root/hw/sparc64/sun4u.c
diff options
context:
space:
mode:
authorPeter Maydell2020-06-16 12:48:22 +0200
committerPeter Maydell2020-06-16 12:48:23 +0200
commit6675a653d2e57ab09c32c0ea7b44a1d6c40a7f58 (patch)
treef111fb308c19e2b4f2dd8b8482e057b4f3490362 /hw/sparc64/sun4u.c
parentMerge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-jun-15-2020' ... (diff)
parentMAINTAINERS: Make section QOM cover hw/core/*bus.c as well (diff)
downloadqemu-6675a653d2e57ab09c32c0ea7b44a1d6c40a7f58.tar.gz
qemu-6675a653d2e57ab09c32c0ea7b44a1d6c40a7f58.tar.xz
qemu-6675a653d2e57ab09c32c0ea7b44a1d6c40a7f58.zip
Merge remote-tracking branch 'remotes/armbru/tags/pull-qom-2020-06-15' into staging
QOM patches for 2020-06-15 # gpg: Signature made Mon 15 Jun 2020 21:07:19 BST # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-qom-2020-06-15: (84 commits) MAINTAINERS: Make section QOM cover hw/core/*bus.c as well qdev: qdev_init_nofail() is now unused, drop qdev: Convert bus-less devices to qdev_realize() with Coccinelle qdev: Use qdev_realize() in qdev_device_add() qdev: Make qdev_realize() support bus-less devices s390x/event-facility: Simplify creation of SCLP event devices microbit: Eliminate two local variables in microbit_init() sysbus: sysbus_init_child_obj() is now unused, drop sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 4 sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 3 sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 2 sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1 qdev: Drop qdev_realize() support for null bus sysbus: Convert to sysbus_realize() etc. with Coccinelle sysbus: New sysbus_realize(), sysbus_realize_and_unref() sysbus: Tidy up sysbus_init_child_obj()'s @childsize arg, part 2 hw/arm/armsse: Pass correct child size to sysbus_init_child_obj() sysbus: Tidy up sysbus_init_child_obj()'s @childsize arg, part 1 microbit: Tidy up sysbus_init_child_obj() @child argument sysbus: Drop useless OBJECT() in sysbus_init_child_obj() calls ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/sparc64/sun4u.c')
-rw-r--r--hw/sparc64/sun4u.c50
1 files changed, 28 insertions, 22 deletions
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index 3a757ec42e..97e6d3a025 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -300,6 +300,7 @@ static void ebus_isa_irq_handler(void *opaque, int n, int level)
static void ebus_realize(PCIDevice *pci_dev, Error **errp)
{
EbusState *s = EBUS(pci_dev);
+ ISADevice *isa_dev;
SysBusDevice *sbd;
DeviceState *dev;
qemu_irq *isa_irq;
@@ -338,7 +339,8 @@ static void ebus_realize(PCIDevice *pci_dev, Error **errp)
for (i = 0; i < MAX_FD; i++) {
fd[i] = drive_get(IF_FLOPPY, 0, i);
}
- dev = DEVICE(isa_create(s->isa_bus, TYPE_ISA_FDC));
+ isa_dev = isa_new(TYPE_ISA_FDC);
+ dev = DEVICE(isa_dev);
if (fd[0]) {
qdev_prop_set_drive(dev, "driveA", blk_by_legacy_dinfo(fd[0]),
&error_abort);
@@ -348,12 +350,12 @@ static void ebus_realize(PCIDevice *pci_dev, Error **errp)
&error_abort);
}
qdev_prop_set_uint32(dev, "dma", -1);
- qdev_init_nofail(dev);
+ isa_realize_and_unref(isa_dev, s->isa_bus, &error_fatal);
/* Power */
- dev = qdev_create(NULL, TYPE_SUN4U_POWER);
- qdev_init_nofail(dev);
+ dev = qdev_new(TYPE_SUN4U_POWER);
sbd = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(sbd, &error_fatal);
memory_region_add_subregion(pci_address_space_io(pci_dev), 0x7240,
sysbus_mmio_get_region(sbd, 0));
@@ -426,9 +428,9 @@ static void prom_init(hwaddr addr, const char *bios_name)
char *filename;
int ret;
- dev = qdev_create(NULL, TYPE_OPENPROM);
- qdev_init_nofail(dev);
+ dev = qdev_new(TYPE_OPENPROM);
s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
sysbus_mmio_map(s, 0, addr);
@@ -520,12 +522,12 @@ static void ram_init(hwaddr addr, ram_addr_t RAM_size)
RamDevice *d;
/* allocate RAM */
- dev = qdev_create(NULL, TYPE_SUN4U_MEMORY);
+ dev = qdev_new(TYPE_SUN4U_MEMORY);
s = SYS_BUS_DEVICE(dev);
d = SUN4U_RAM(dev);
d->size = RAM_size;
- qdev_init_nofail(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
sysbus_mmio_map(s, 0, addr);
}
@@ -572,8 +574,8 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
cpu = sparc64_cpu_devinit(machine->cpu_type, hwdef->prom_addr);
/* IOMMU */
- iommu = qdev_create(NULL, TYPE_SUN4U_IOMMU);
- qdev_init_nofail(iommu);
+ iommu = qdev_new(TYPE_SUN4U_IOMMU);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(iommu), &error_fatal);
/* set up devices */
ram_init(0, machine->ram_size);
@@ -581,12 +583,12 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
prom_init(hwdef->prom_addr, bios_name);
/* Init sabre (PCI host bridge) */
- sabre = SABRE_DEVICE(qdev_create(NULL, TYPE_SABRE));
+ sabre = SABRE_DEVICE(qdev_new(TYPE_SABRE));
qdev_prop_set_uint64(DEVICE(sabre), "special-base", PBM_SPECIAL_BASE);
qdev_prop_set_uint64(DEVICE(sabre), "mem-base", PBM_MEM_BASE);
object_property_set_link(OBJECT(sabre), OBJECT(iommu), "iommu",
&error_abort);
- qdev_init_nofail(DEVICE(sabre));
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(sabre), &error_fatal);
/* Wire up PCI interrupts to CPU */
for (i = 0; i < IVEC_MAX; i++) {
@@ -605,10 +607,10 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
pci_busA->slot_reserved_mask = 0xfffffff1;
pci_busB->slot_reserved_mask = 0xfffffff0;
- ebus = pci_create_multifunction(pci_busA, PCI_DEVFN(1, 0), true, TYPE_EBUS);
+ ebus = pci_new_multifunction(PCI_DEVFN(1, 0), true, TYPE_EBUS);
qdev_prop_set_uint64(DEVICE(ebus), "console-serial-base",
hwdef->console_serial_base);
- qdev_init_nofail(DEVICE(ebus));
+ pci_realize_and_unref(ebus, pci_busA, &error_fatal);
/* Wire up "well-known" ISA IRQs to PBM legacy obio IRQs */
qdev_connect_gpio_out_named(DEVICE(ebus), "isa-irq", 7,
@@ -635,24 +637,28 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
memset(&macaddr, 0, sizeof(MACAddr));
onboard_nic = false;
for (i = 0; i < nb_nics; i++) {
+ PCIBus *bus;
nd = &nd_table[i];
if (!nd->model || strcmp(nd->model, "sunhme") == 0) {
if (!onboard_nic) {
- pci_dev = pci_create_multifunction(pci_busA, PCI_DEVFN(1, 1),
+ pci_dev = pci_new_multifunction(PCI_DEVFN(1, 1),
true, "sunhme");
+ bus = pci_busA;
memcpy(&macaddr, &nd->macaddr.a, sizeof(MACAddr));
onboard_nic = true;
} else {
- pci_dev = pci_create(pci_busB, -1, "sunhme");
+ pci_dev = pci_new(-1, "sunhme");
+ bus = pci_busB;
}
} else {
- pci_dev = pci_create(pci_busB, -1, nd->model);
+ pci_dev = pci_new(-1, nd->model);
+ bus = pci_busB;
}
dev = &pci_dev->qdev;
qdev_set_nic_properties(dev, nd);
- qdev_init_nofail(dev);
+ pci_realize_and_unref(pci_dev, bus, &error_fatal);
}
/* If we don't have an onboard NIC, grab a default MAC address so that
@@ -661,9 +667,9 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
qemu_macaddr_default_if_unset(&macaddr);
}
- pci_dev = pci_create(pci_busA, PCI_DEVFN(3, 0), "cmd646-ide");
+ pci_dev = pci_new(PCI_DEVFN(3, 0), "cmd646-ide");
qdev_prop_set_uint32(&pci_dev->qdev, "secondary", 1);
- qdev_init_nofail(&pci_dev->qdev);
+ pci_realize_and_unref(pci_dev, pci_busA, &error_fatal);
pci_ide_create_devs(pci_dev);
/* Map NVRAM into I/O (ebus) space */
@@ -689,10 +695,10 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
graphic_width, graphic_height, graphic_depth,
(uint8_t *)&macaddr);
- dev = qdev_create(NULL, TYPE_FW_CFG_IO);
+ dev = qdev_new(TYPE_FW_CFG_IO);
qdev_prop_set_bit(dev, "dma_enabled", false);
object_property_add_child(OBJECT(ebus), TYPE_FW_CFG, OBJECT(dev));
- qdev_init_nofail(dev);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
memory_region_add_subregion(pci_address_space_io(ebus), BIOS_CFG_IOPORT,
&FW_CFG_IO(dev)->comb_iomem);