summaryrefslogtreecommitdiffstats
path: root/hw/xio3130_downstream.c
diff options
context:
space:
mode:
authorAnthony Liguori2012-07-30 17:00:48 +0200
committerAnthony Liguori2012-07-30 17:00:48 +0200
commit5e3bc7144edd6e4fa2824944e5eb16c28197dd5a (patch)
treee12e9145e74916485b482b2336bf1775a177e635 /hw/xio3130_downstream.c
parentMerge remote-tracking branch 'bonzini/nbd-next' into staging (diff)
parentMerge branch pci into master (diff)
downloadqemu-5e3bc7144edd6e4fa2824944e5eb16c28197dd5a.tar.gz
qemu-5e3bc7144edd6e4fa2824944e5eb16c28197dd5a.tar.xz
qemu-5e3bc7144edd6e4fa2824944e5eb16c28197dd5a.zip
Merge remote-tracking branch 'mst/tags/for_anthony' into staging
* mst/tags/for_anthony: msi/msix: added API to set MSI message address and data pci: Add INTx routing notifier pci: Add pci_device_route_intx_to_irq pci: Unregister BARs before device exit pci: convert PCIUnregisterFunc to void msix: Switch msix_uninit to return void msix: Allow full specification of MSIX layout msix: Split PBA into it's own MemoryRegion msix: Note endian TODO item msix: Move msix_mmio_read virtio: Convert to msix_init_exclusive_bar() interface ivshmem: Convert to msix_init_exclusive_bar() interface msix: Add simple BAR allocation MSIX setup functions msix: fix PCIDevice naming inconsistency msix: drop unused msix_bar_size, require valid bar_size
Diffstat (limited to 'hw/xio3130_downstream.c')
-rw-r--r--hw/xio3130_downstream.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/hw/xio3130_downstream.c b/hw/xio3130_downstream.c
index 56d1b353d0..0d8a5e7020 100644
--- a/hw/xio3130_downstream.c
+++ b/hw/xio3130_downstream.c
@@ -60,7 +60,6 @@ static int xio3130_downstream_initfn(PCIDevice *d)
PCIEPort *p = DO_UPCAST(PCIEPort, br, br);
PCIESlot *s = DO_UPCAST(PCIESlot, port, p);
int rc;
- int tmp;
rc = pci_bridge_initfn(d);
if (rc < 0) {
@@ -108,12 +107,11 @@ err_pcie_cap:
err_msi:
msi_uninit(d);
err_bridge:
- tmp = pci_bridge_exitfn(d);
- assert(!tmp);
+ pci_bridge_exitfn(d);
return rc;
}
-static int xio3130_downstream_exitfn(PCIDevice *d)
+static void xio3130_downstream_exitfn(PCIDevice *d)
{
PCIBridge* br = DO_UPCAST(PCIBridge, dev, d);
PCIEPort *p = DO_UPCAST(PCIEPort, br, br);
@@ -123,7 +121,7 @@ static int xio3130_downstream_exitfn(PCIDevice *d)
pcie_chassis_del_slot(s);
pcie_cap_exit(d);
msi_uninit(d);
- return pci_bridge_exitfn(d);
+ pci_bridge_exitfn(d);
}
PCIESlot *xio3130_downstream_init(PCIBus *bus, int devfn, bool multifunction,