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| author | Peter Maydell | 2019-01-28 17:26:47 +0100 |
|---|---|---|
| committer | Peter Maydell | 2019-01-28 17:26:47 +0100 |
| commit | 3a183e330dbd7dbcac3841737ac874979552cca2 (patch) | |
| tree | a5f35bdb744f32e874eb40cd9037247cf6945bb3 /include/exec/cpu_ldst.h | |
| parent | Merge remote-tracking branch 'remotes/jnsnow/tags/ide-pull-request' into staging (diff) | |
| parent | cputlb: Remove static tlb sizing (diff) | |
| download | qemu-3a183e330dbd7dbcac3841737ac874979552cca2.tar.gz qemu-3a183e330dbd7dbcac3841737ac874979552cca2.tar.xz qemu-3a183e330dbd7dbcac3841737ac874979552cca2.zip | |
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190128' into staging
Backend vector enhancements
Dynamic tlb resizing
# gpg: Signature made Mon 28 Jan 2019 15:57:19 GMT
# gpg: using RSA key 64DF38E8AF7E215F
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth/tags/pull-tcg-20190128: (23 commits)
cputlb: Remove static tlb sizing
tcg/tci: enable dynamic TLB sizing
tcg/mips: enable dynamic TLB sizing
tcg/mips: Fix tcg_out_qemu_ld_slow_path
tcg/arm: enable dynamic TLB sizing
tcg/riscv: enable dynamic TLB sizing
tcg/s390: enable dynamic TLB sizing
tcg/sparc: enable dynamic TLB sizing
tcg/ppc: enable dynamic TLB sizing
tcg/aarch64: enable dynamic TLB sizing
tcg/i386: enable dynamic TLB sizing
tcg: introduce dynamic TLB sizing
cputlb: do not evict empty entries to the vtlb
tcg/aarch64: Implement vector minmax arithmetic
tcg/aarch64: Implement vector saturating arithmetic
tcg/i386: Implement vector minmax arithmetic
tcg/i386: Implement vector saturating arithmetic
tcg/i386: Split subroutines out of tcg_expand_vec_op
tcg: Add opcodes for vector minmax arithmetic
tcg: Add opcodes for vector saturated arithmetic
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/exec/cpu_ldst.h')
| -rw-r--r-- | include/exec/cpu_ldst.h | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 959068495a..d78041d7a0 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -139,7 +139,14 @@ static inline target_ulong tlb_addr_write(const CPUTLBEntry *entry) static inline uintptr_t tlb_index(CPUArchState *env, uintptr_t mmu_idx, target_ulong addr) { - return (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); + uintptr_t size_mask = env->tlb_mask[mmu_idx] >> CPU_TLB_ENTRY_BITS; + + return (addr >> TARGET_PAGE_BITS) & size_mask; +} + +static inline size_t tlb_n_entries(CPUArchState *env, uintptr_t mmu_idx) +{ + return (env->tlb_mask[mmu_idx] >> CPU_TLB_ENTRY_BITS) + 1; } /* Find the TLB entry corresponding to the mmu_idx + address pair. */ |